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MC100EP139DWR2 数据表 (PDF) - ON Semiconductor

MC100EP139DWR2 Datasheet PDF - ON Semiconductor
部件名 MC100EP139DWR2
下载  MC100EP139DWR2 下载

文件大小   102.33 Kbytes
  14 Pages
制造商  ONSEMI [ON Semiconductor]
网页  http://www.onsemi.com
标志 ONSEMI - ON Semiconductor
功能描述 3.3V / 5V ECL /2/4, /4/5/6 Clock Generation Chip

MC100EP139DWR2 Datasheet (PDF)

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MC100EP139DWR2 Datasheet PDF - ON Semiconductor

部件名 MC100EP139DWR2
下载  MC100EP139DWR2 Click to download

文件大小   102.33 Kbytes
  14 Pages
制造商  ONSEMI [ON Semiconductor]
网页  http://www.onsemi.com
标志 ONSEMI - ON Semiconductor
功能描述 3.3V / 5V ECL /2/4, /4/5/6 Clock Generation Chip

MC100EP139DWR2 数据表 (HTML) - ON Semiconductor

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MC100EP139DWR2 产品详情

Description
The MC10/100EP139 is a low skew ÷2/4, ÷4/5/6 clock generation chip designed explicitly for low skew clock generation applications. The internal dividers are synchronous to each other, therefore, the common output edges are all precisely aligned. The device can be driven by either a differential or single−ended ECL or, if positive power supplies are used, LVPECL input signals. In addition, by using the VBB output, a sinusoidal source can be AC coupled into the device.

Features
• Maximum Frequency > 1.0 GHz Typical
• 50 ps Output−to−Output Skew
• PECL Mode Operating Range: VCC = 3.0 V to 5.5 V with VEE = 0 V
• NECL Mode Operating Range: VCC = 0 V with VEE = −3.0 V to −5.5 V
• Open Input Default State
• Safety Clamp on Inputs
• Synchronous Enable/Disable
• Master Reset for Synchronization of Multiple Chips
• VBB Output
• Pb−Free Packages are Available




类似零件编号 - MC100EP139DWR2

制造商部件名数据表功能描述
logo
ON Semiconductor
MC100EP139DWR2 ONSEMI-MC100EP139DWR2 Datasheet
140Kb / 8P
   첨2/4, 첨4./5/6 Clock Generation Chip
December, 1999 ??Rev. 1
MC100EP139DWR2 ONSEMI-MC100EP139DWR2 Datasheet
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MC100EP139DWR2G ONSEMI-MC100EP139DWR2G Datasheet
192Kb / 14P
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MC100EP139DWR2G ONSEMI-MC100EP139DWR2G Datasheet
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类似说明 - MC100EP139DWR2

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MC10EP139 ONSEMI-MC10EP139_06 Datasheet
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December, 2006 ??Rev. 7
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