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74ALVCH16240DTR 数据表 (PDF) - ON Semiconductor

74ALVCH16240DTR Datasheet PDF - ON Semiconductor
部件名 74ALVCH16240DTR
下载  74ALVCH16240DTR 下载

文件大小   267.12 Kbytes
  10 Pages
制造商  ONSEMI [ON Semiconductor]
网页  http://www.onsemi.com
标志 ONSEMI - ON Semiconductor
功能描述 Low?뭋oltage 16?묪it Buffer

74ALVCH16240DTR Datasheet (PDF)

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74ALVCH16240DTR Datasheet PDF - ON Semiconductor

部件名 74ALVCH16240DTR
下载  74ALVCH16240DTR Click to download

文件大小   267.12 Kbytes
  10 Pages
制造商  ONSEMI [ON Semiconductor]
网页  http://www.onsemi.com
标志 ONSEMI - ON Semiconductor
功能描述 Low?뭋oltage 16?묪it Buffer

74ALVCH16240DTR 数据表 (HTML) - ON Semiconductor

74ALVCH16240DTR Datasheet HTML 1Page - ON Semiconductor 74ALVCH16240DTR Datasheet HTML 2Page - ON Semiconductor 74ALVCH16240DTR Datasheet HTML 3Page - ON Semiconductor 74ALVCH16240DTR Datasheet HTML 4Page - ON Semiconductor 74ALVCH16240DTR Datasheet HTML 5Page - ON Semiconductor 74ALVCH16240DTR Datasheet HTML 6Page - ON Semiconductor 74ALVCH16240DTR Datasheet HTML 7Page - ON Semiconductor 74ALVCH16240DTR Datasheet HTML 8Page - ON Semiconductor 74ALVCH16240DTR Datasheet HTML 9Page - ON Semiconductor 74ALVCH16240DTR Datasheet HTML 10Page - ON Semiconductor

74ALVCH16240DTR 产品详情

Low−Voltage 16−Bit Buffer with Bus Hold 1.8/2.5/3.3 V
(3−State, Inverting)


The 74ALVCH16240 is an advanced performance, inverting 16−bit buffer. It is designed for very high−speed, very low−power operation in 1.8 V, 2.5 V or 3.3 V systems.
The 74ALVCH16240 is nibble controlled with each nibble functioning identically, but independently. The control pins may be tied together to obtain full 16−bit operation. The 3−state outputs are controlled by an Output Enable (OEn) input for each nibble. When OEn is LOW, the outputs are on. When OEn is HIGH, the outputs are in the high impedance state. The data inputs include active bus−hold circuitry, eliminating the need for external pull−up resistors to hold unused or floating inputs at a valid logic state.

• Designed for Low Voltage Operation: VCC = 1.65 to 3.6 V
• 3.6 V Tolerant Inputs and Outputs
• High−Speed Operation:
   3.0 ns Max for 3.0 to 3.6 V
   3.7 ns Max for 2.3 to 2.7 V
   6.0 ns Max for 1.65 to 1.95 V
• Static Drive:
   ±24 mA Drive at 3.0 V
   ±12 mA Drive at 2.3 V
   ±4 mA Drive at 1.65 V
• Supports Live Insertion and Withdrawal
• Includes Active Bus−Hold to Hold Unused or Floating Inputs at a
   Valid Logic State
• IOFF Specification Guarantees High Impedance When VCC = 0 V†
• Near Zero Static Supply Current in All Three Logic States (40 A)
   Substantially Reduces System Power Requirements
• Latchup Performance Exceeds ±250 mA @ 125°C
• ESD Performance: Human Body Model >2000V; Machine Model >200V
• Second Source to Industry Standard 74ALVCH16240




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该公司的产品旨在具有节能,可靠和成本效益,并用于多种应用,包括便携式电子产品,工业自动化系统,可再生能源系统和汽车电子产品。
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