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MC100EP52DTR2 数据表 (PDF) - ON Semiconductor

MC100EP52DTR2 Datasheet PDF - ON Semiconductor
部件名 MC100EP52DTR2
下载  MC100EP52DTR2 下载

文件大小   83.55 Kbytes
  10 Pages
制造商  ONSEMI [ON Semiconductor]
网页  http://www.onsemi.com
标志 ONSEMI - ON Semiconductor
功能描述 3.3V / 5V ECL Differential Receiver/Driver with Internal Termination Data and Clock D Flip-Flop

MC100EP52DTR2 Datasheet (PDF)

Go To PDF Page 下载 数据表
MC100EP52DTR2 Datasheet PDF - ON Semiconductor

部件名 MC100EP52DTR2
下载  MC100EP52DTR2 Click to download

文件大小   83.55 Kbytes
  10 Pages
制造商  ONSEMI [ON Semiconductor]
网页  http://www.onsemi.com
标志 ONSEMI - ON Semiconductor
功能描述 3.3V / 5V ECL Differential Receiver/Driver with Internal Termination Data and Clock D Flip-Flop

MC100EP52DTR2 数据表 (HTML) - ON Semiconductor

MC100EP52DTR2 Datasheet HTML 1Page - ON Semiconductor MC100EP52DTR2 Datasheet HTML 2Page - ON Semiconductor MC100EP52DTR2 Datasheet HTML 3Page - ON Semiconductor MC100EP52DTR2 Datasheet HTML 4Page - ON Semiconductor MC100EP52DTR2 Datasheet HTML 5Page - ON Semiconductor MC100EP52DTR2 Datasheet HTML 6Page - ON Semiconductor MC100EP52DTR2 Datasheet HTML 7Page - ON Semiconductor MC100EP52DTR2 Datasheet HTML 8Page - ON Semiconductor MC100EP52DTR2 Datasheet HTML 9Page - ON Semiconductor MC100EP52DTR2 Datasheet HTML 10Page - ON Semiconductor

MC100EP52DTR2 产品详情

Description
The MC10EP/100EP52 is a differential data, differential clock D flip−flop. The device is pin and functionally equivalent to the EL52 device.
Data enters the master portion of the flip−flop when the clock is LOW and is transferred to the slave, and thus the outputs, upon a positive transition of the clock. The differential clock inputs of the EP52 allow the device to also be used as a negative edge triggered device.
The EP52 employs input clamping circuitry so that under open input conditions (pulled down to VEE) the outputs of the device will remain stable.
The 100 Series contains temperature compensation.

Features
• 330 ps Typical Propagation Delay
• Maximum Frequency > 4 GHz Typical
• PECL Mode: VCC = 3.0 V to 5.5 V with VEE = 0 V
• NECL Mode: VCC = 0 V with VEE = −3.0 V to −5.5 V
• Open Input Default State
• Safety Clamp on Inputs
• Q Output Will Default LOW with Inputs Open or at VEE
• Pb−Free Packages are Available




类似零件编号 - MC100EP52DTR2

制造商部件名数据表功能描述
logo
ON Semiconductor
MC100EP52DTR2 ONSEMI-MC100EP52DTR2 Datasheet
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MC100EP52DTR2G ONSEMI-MC100EP52DTR2G Datasheet
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August, 2016 ??Rev. 8
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类似说明 - MC100EP52DTR2

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