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ISPGDX2 数据表 (PDF) - Lattice Semiconductor

ISPGDX2 Datasheet PDF - Lattice Semiconductor
部件名 ISPGDX2
下载  ISPGDX2 下载

文件大小   546.87 Kbytes
  72 Pages
制造商  LATTICE [Lattice Semiconductor]
网页  http://www.latticesemi.com
标志 LATTICE - Lattice Semiconductor
功能描述 High Performance Interfacing and Switching

ISPGDX2 Datasheet (PDF)

Go To PDF Page 下载 数据表
ISPGDX2 Datasheet PDF - Lattice Semiconductor

部件名 ISPGDX2
下载  ISPGDX2 Click to download

文件大小   546.87 Kbytes
  72 Pages
制造商  LATTICE [Lattice Semiconductor]
网页  http://www.latticesemi.com
标志 LATTICE - Lattice Semiconductor
功能描述 High Performance Interfacing and Switching

ISPGDX2 数据表 (HTML) - Lattice Semiconductor

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ISPGDX2 产品详情

Introduction
The ispGDX2™ family is Lattice’s second generation in-system programmable generic digital crosspoint switch for high speed bus switching and interface applications.
The ispGDX2 family is available in two options. The standard device supports sysHSI capability for ultra fast serial communications while the lower-cost “E-series” supports the same high-performance FPGA fabric without the sysHSI Block.
This family of switches combines a flexible switching architecture with advanced sysIO interfaces including high performance sysHSI Blocks, and sysCLOCK PLLs to meet the needs of the today’s high-speed systems. Through a muliplexer-intensive architecture, the ispGDX2 facilitates a variety of common switching functions.

Features
■ High Performance Bus Switching
   • High bandwidth
      – Up to 12.8 Gbps (SERDES)
      – Up to 38 Gbps (without SERDES)
   • Up to 16 (15x10) FIFOs for data buffering
   • High speed performance
      – fMAX = 360MHz
      – tPD = 3.0ns
      – tCO = 2.9ns
      – tS = 2.0ns
   • Built-in programmable control logic capability
   • I/O intensive: 64 to 256 I/Os
   • Expanded MUX capability up to 188:1 MUX
■ sysCLOCK™ PLL
   • Frequency synthesis and skew management
   • Clock multiply and divide capability
   • Clock shifting up to +/-2.35ns in 335ps steps
   • Up to four PLLs
■ sysIO™ Interfacing
   • LVCMOS 1.8, 2.5, 3.3 and LVTTL support for standard board interfaces
   • SSTL 2/3 Class I and II support
   • HSTL Class I, III and IV support
   • GTL+, PCI-X for bus interfaces
   • LVPECL, LVDS and Bus LVDS differential support
   • Hot socketing
   • Programmable drive strength
■ Two Options Available
   • High-performance sysHSI (standard part number)
   • Low-cost, no sysHSI (“E-Series”)
■ sysHSI Blocks Provide up to 16 High-speed Channels
   • Serializer/de-serializer (SERDES) included
   • Clock Data Recovery (CDR) built in
   • 800 Mbps per channel
   • LVDS differential support
   • 10B/12B support
      – Encoding / decoding
      – Bit alignment
      – Symbol alignment
   • 8B/10B support
      – Bit alignment
      – Symbol alignment
   • Source Synchronous support
■ Flexible Programming and Testing
   • IEEE 1532 compliant In-System Programmability (ISP™)
   • Boundary scan test through IEEE 1149.1 interface
   • 3.3V, 2.5V or 1.8V power supplies
   • 5V tolerant I/O for LVCMOS 3.3 and LVTTL interfaces




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