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KSZ9021RN 数据表 (PDF) - Micrel Semiconductor

KSZ9021RN Datasheet PDF - Micrel Semiconductor
部件名 KSZ9021RN
下载  KSZ9021RN 下载

文件大小   124.33 Kbytes
  2 Pages
制造商  MICREL [Micrel Semiconductor]
网页  http://www.micrel.com
标志 MICREL - Micrel Semiconductor
功能描述 Single-port Gigabit Transceiver with RGMII Support

KSZ9021RN Datasheet (PDF)

Go To PDF Page 下载 数据表
KSZ9021RN Datasheet PDF - Micrel Semiconductor

部件名 KSZ9021RN
下载  KSZ9021RN Click to download

文件大小   124.33 Kbytes
  2 Pages
制造商  MICREL [Micrel Semiconductor]
网页  http://www.micrel.com
标志 MICREL - Micrel Semiconductor
功能描述 Single-port Gigabit Transceiver with RGMII Support

KSZ9021RN 数据表 (HTML) - Micrel Semiconductor

KSZ9021RN Datasheet HTML 1Page - Micrel Semiconductor KSZ9021RN Datasheet HTML 2Page - Micrel Semiconductor

KSZ9021RN 产品详情

General Description
The KSZ9021RL is a completely integrated triple speed (10Base-T/100Base-TX/1000Base-T) Ethernet Physical Layer Transceiver for transmission and reception of data over standard CAT-5 unshielded twisted pair (UTP) cable.

Features
• Single-chip 10/100/1000Mbps IEEE 802.3 compliant Ethernet Transceiver
• RGMII interface compliant to RGMII Version 1.3
• RGMII I/Os with 3.3V/2.5V tolerant and programmable timings to adjust and correct delays on both Tx and Rx paths
• Auto-negotiation to automatically select the highest link up speed (10/100/100Mbps) and duplex (half/full)
• On-chip termination resistors for the differential pairs
• On-chip LDO controller to support single 3.3V supply operation – requires only external FET to generate 1.2V for the core
• Jumbo frame support up to 16KB
• 125MHz Reference Clock Output
• Programmable LED outputs for link, activity and speed
• Baseline Wander Correction
• LinkMD® TDR-based cable diagnostics for identification of faulty copper cabling
• Parametric NAND Tree support for fault detection between chip I/Os and board.
• Loopback modes for diagnostics
• Automatic MDI/MDI-X crossover for detection and correction of pair swap at all speeds of operation
• Automatic detection and correction of pair swap, pair skew and pair polarity
• MDC/MDIO Management Interface for PHY register configuration
• Interrupt pin option
• Power down and power saving modes
• Operating Voltages
    Core: 1.2V (external FET or regulator)
    I/O: 3.3V or 2.5V
    Transceiver: 3.3V
• Available packages
    64-pin E-LQFP (10mm x 10mm): KSZ9021RL
    48-pin QFN (7mm x 7mm): KSZ9021RN

Applications
• Laser/Network printer
• Network attached storage (NAS)
• Network server
• Gigabit LAN on motherboard (GLOM)
• Broadband gateway
• Gigabit SOHO/SMB router
• IPTV
• IP Set-top box
• Game console
• Triple-play (data, voice, video) media center
• Media converter




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