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DM7473N 数据表 (PDF) - Fairchild Semiconductor

DM7473N Datasheet PDF - Fairchild Semiconductor
部件名 DM7473N
下载  DM7473N 下载

文件大小   39.48 Kbytes
  3 Pages
制造商  FAIRCHILD [Fairchild Semiconductor]
网页  http://www.fairchildsemi.com
标志 FAIRCHILD - Fairchild Semiconductor
功能描述 Dual Master-Slave J-K Flip-Flops with Clear and Complementary Outputs

DM7473N Datasheet (PDF)

Go To PDF Page 下载 数据表
DM7473N Datasheet PDF - Fairchild Semiconductor

部件名 DM7473N
下载  DM7473N Click to download

文件大小   39.48 Kbytes
  3 Pages
制造商  FAIRCHILD [Fairchild Semiconductor]
网页  http://www.fairchildsemi.com
标志 FAIRCHILD - Fairchild Semiconductor
功能描述 Dual Master-Slave J-K Flip-Flops with Clear and Complementary Outputs

DM7473N 数据表 (HTML) - Fairchild Semiconductor

DM7473N Datasheet HTML 1Page - Fairchild Semiconductor DM7473N Datasheet HTML 2Page - Fairchild Semiconductor DM7473N Datasheet HTML 3Page - Fairchild Semiconductor

DM7473N 产品详情

General Description

This device contains two independent positive pulse triggered J-K flip-flops with complementary outputs. The J and K data is processed by the flip-flops after a complete clock pulse. While the clock is LOW the slave is isolated from the master. On the positive transition of the clock, the data from the J and K inputs is transferred to the master. While the clock is HIGH the J and K inputs are disabled. On the negative transition of the clock, the data from the master is transferred to the slave. The logic states of the J and K inputs must not be allowed to change while the clock is HIGH. Data transfers to the outputs on the falling edge of the clock pulse. A LOW logic level on the clear input will reset the outputs regardless of the logic states of the other inputs.



 




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关于 Fairchild Semiconductor


Fairchild半导体是一家开创性的半导体公司,成立于1950年代后期。
该公司以其在第一个商业晶体管的开发方面的创新而闻名,以及对综合电路技术发展的贡献。
Fairchild成为电力半导体,模拟和混合信号综合电路以及其他半导体产品的领先供应商。
该公司是在2016年被ON半导体收购的,其产品和技术继续在ON半导体品牌下开发和出售。

*此信息仅供一般参考,对于因上述信息造成的任何损失或损害,我们概不负责。




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