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EPM3128A 数据表 (PDF) - Altera Corporation

EPM3128A Datasheet PDF - Altera Corporation
部件名 EPM3128A
下载  EPM3128A 下载

文件大小   715.02 Kbytes
  46 Pages
制造商  ALTERA [Altera Corporation]
网页  http://www.altera.com
标志 ALTERA - Altera Corporation
功能描述 Programmable Logic Device Family

EPM3128A Datasheet (PDF)

Go To PDF Page 下载 数据表
EPM3128A Datasheet PDF - Altera Corporation

部件名 EPM3128A
下载  EPM3128A Click to download

文件大小   715.02 Kbytes
  46 Pages
制造商  ALTERA [Altera Corporation]
网页  http://www.altera.com
标志 ALTERA - Altera Corporation
功能描述 Programmable Logic Device Family

EPM3128A 数据表 (HTML) - Altera Corporation

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EPM3128A 产品详情

General Description

MAX 3000A devices are low–cost, high–performance devices based on the Altera MAX architecture. Fabricatedwith advanced CMOS technology, the EEPROM–based MAX 3000A devices operate with a 3.3-V supply voltage and provide 600 to 10,000 usable gates, ISP, pin-to-pin delays as fast as 4.5 ns, and counter speeds of up to 227.3 MHz. MAX 3000A devices in the –4, –5, –6, –7, and –10 speed grades are compatible with the timing requirements of the PCI Special Interest Group (PCI SIG) PCI Local Bus Specification, Revision 2.2. See Table 2.



Features...

■ High–performance, low–cost CMOS EEPROM–based programmable logic devices (PLDs) built on a MAX® architecture (see Table 1)

■ 3.3-V in-system programmability(ISP) through the built–in IEEE Std. 1149.1 Joint Test ActionGroup (JTAG) interface with advanced pin-locking capability

– ISP circuitry compliant with IEEE Std. 1532

■ Built–in boundary-scan test (BST) circuitry compliant with IEEE Std. 1149.1-1990

■ Enhanced ISP features:

– Enhanced ISP algorithm for faster programming

– ISP_Done bit to ensure complete programming

– Pull-up resistor on I/O pinsduring in–system programming

■ High–density PLDs ranging from 600 to 10,000 usable gates

■ 4.5–ns pin–to–pin logic delays with counter frequencies of up to 227.3 MHz

■ MultiVoltTM

I/O interface enabling the device core to run at 3.3 V, while I/O pins are compatible with 5.0–V, 3.3–V, and 2.5–V logic levels

■ Pin counts ranging from 44 to 256 in a variety of thin quad flat pack (TQFP), plastic quad flat pack (PQFP), plastic J–lead chip carrier (PLCC), and FineLine BGATM packages

■ Hot–socketing support

■ Programmable interconnect array (PIA) continuous routing structure for fast, predictable performance

■ Industrial temperature range

■ PCI compatible

■ Bus–friendly architecture including programmable slew–rate control

■ Open–drain output option

■ Programmable macrocell flipflops with individual clear, preset, clock, and clock enable controls

■ Programmable power–saving mode for a power reduction of over 50%in each macrocell

■ Configurable expander product–term distribution, allowing up to 32 product terms per macrocell

■ Programmable security bit for protection of proprietary designs

■ Enhanced architectural features, including:

– 6 or 10 pin– or logic–driven output enable signals

– Two global clock signals with optional inversion

– Enhanced interconnect resources for improved routability

– Programmable output slew–rate control

■ Software design support and automatic place–and–route provided by Altera’s development systems for Windows–based PCs and Sun SPARCstations, and HP 9000 Series 700/800 workstations

■ Additional design entry and simulation support provided by EDIF 2 0 0 and 3 0 0 netlist files, library of parameterized modules (LPM), Verilog HDL, VHDL, and other interfaces to popular EDA tools from

third–party manufacturers such as Cadence, Exemplar Logic, Mentor Graphics, OrCAD, Synopsys, Synplicity, and VeriBest

■ Programming support with the Altera master programming unit (MPU), MasterBlasterTM communications cable, ByteBlasterMVTM parallel port download cable, BitBlasterTM serial download cable as well as programming hardware from third–party manufacturers and any in–circuit tester that supports JamTM

Standard Test and Programming Language (STAPL) Files (.jam), Jam STAPL Byte-Code Files (.jbc), or Serial Vector Format Files (.svf)




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关于 Altera Corporation


Altera Corporation是美国可编程逻辑设备(PLD)的美国制造商,可重新配置的复杂数字电路。它是在2015年被英特尔公司收购的,现在是英特尔的子公司。

Altera成立于1983年,是可编程逻辑领域中的先驱之一,提供了一系列PLD产品,包括现场可编程的门阵列(FPGA),复杂的可编程逻辑设备(CPLD)和用于数字信号处理和内存的专业芯片接口功能。该公司的产品用于多种应用,包括通信系统,工业自动化,医疗设备和军事系统。

Altera以其在PLD市场的创新而闻名,包括发展高密度FPGA和低功率,高性能CPLD。随着英特尔的收购,Altera继续为其客户提供PLD解决方案,利用世界上最大的技术公司之一的资源和技术。

*此信息仅供一般参考,对于因上述信息造成的任何损失或损害,我们概不负责。




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