ST72324J2 datasheet(128/156 Pages) STMICROELECTRONICS

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ST72324J/K

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12.6 MEMORY CHARACTERISTICS

12.6.1 RAM and Hardware Registers

12.6.2 FLASH Memory

Notes:

1. Minimum VDD supply voltage without losing data stored in RAM (in HALT mode or under RESET) or in hardware reg-

isters (only in HALT mode). Not tested in production.

2. Data based on characterization results, not tested in production.

3. VPP must be applied only during the programming or erasing operation and not permanently for reliability reasons.

4. Data based on simulation results, not tested in production.

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

VRM

Data retention mode 1)

HALT mode (or RESET)

1.6

DUAL VOLTAGE HDFLASH MEMORY

Symbol

Parameter

Conditions

Min 2)

Typ

Max 2)

Unit

fCPU

Operating frequency

Read mode

MHz

Write / Erase mode

VPP

Programming voltage 3)

4.5V

≤ V

DD ≤ 5.5V

11.4

12.6

IDD

Supply current4)

RUN mode (fCPU = 4MHz)

Write / Erase

Power down mode / HALT

µA

IPP

VPP current

Read (VPP=12V)

200

Write / Erase

tVPP

Internal VPP stabilization time

µs

tRET

Data retention

TA=55°C

years

NRW

Write erase cycles

TA=25°C

100

cycles

TPROG

TERASE

Programming or erasing tempera-

ture range

-40

°C

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