AM652X datasheet(228/277 Pages) TI1

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PWM_A/B

SPRSP08_TIMING_PRU_PWM_01

PRPWM1

PIF_CLK

PIF_DATA_OUT

PRPIF1

PRPIF2H

PRPIF3

SPRSP08_TIMING_PIF_02

PRPIF2L

PIF_DATA_EN

PRPIF4

228

AM6548, AM6528, AM6546

AM6526, AM6527

SPRSP08I – NOVEMBER 2017 – REVISED DECEMBER 2019

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Product Folder Links: AM6548 AM6528 AM6546 AM6526 AM6527

Specifications

(1) P = 1x (or TX) clock period, defined by TX_DIV_FACTOR and TX_DIV_FACTOR_FRAC in the ICSSG_PRUn_ED_TX_CFG_REG,

where n = 0 or 1.

Figure 5-102. PRU_ICSSG PRU Peripheral Interface Switching Characteristics

5.9.5.21.2 PRU_ICSSG Pulse Width Modulation (PWM)

5.9.5.21.2.1 PRU_ICSSG PWM Electrical Data and Timing

Table 5-97. PRU_ICSSG PWM Switching Characteristics

NO.

PARAMETER

DESCRIPTION

MIN

MAX

UNIT

PRPWM

tsk(PWM_A/B)

PWM_A/B skew

Figure 5-103. PRU_ICSSG PRU PWM Timing

5.9.5.21.3 PRU_ICSSG Industrial Ethernet Peripheral (PRU_ICSSG IEP)

5.9.5.21.3.1 PRU_ICSSG IEP Electrical Data and Timing

Table 5-98. PRU_ICSSG IEP Timing Requirements - Input Validated with SYNCx

NO.

PARAMETER

DESCRIPTION

MIN

MAX

UNIT

PRIEP1

tw(EDC_SYNCx_OUTL)

Pulse Duration, EDC_SYNCx_OUT Low

-2+20×P

(1)

PRIEP2

tw(EDC_SYNCx_OUTH)

Pulse Duration, EDC_SYNCx_OUT High

-2+20×P

(1)

PRIEP3

tsu(EDIO_DATA_IN-

EDC_SYNCx_OUT)

Setup time, EDIO_DATA_IN valid before EDC_SYNCx_OUT active

edge

PRIEP4

th(EDC_SYNCx_OUT-

EDIO_DATA_IN)

Hold time, EDIO_DATA_IN valid after EDC_SYNCx_OUT active edge

AM652X 数据表(PDF) 228 Page - Texas Instruments

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