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AM652X 数据表(PDF) 127 Page - Texas Instruments |
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AM652X 数据表(HTML) 127 Page - Texas Instruments |
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127 / 277 page  127 AM6548, AM6528, AM6546 AM6526, AM6527 www.ti.com SPRSP08I – NOVEMBER 2017 – REVISED DECEMBER 2019 Submit Documentation Feedback Product Folder Links: AM6548 AM6528 AM6546 AM6526 AM6527 Specifications Copyright © 2017–2019, Texas Instruments Incorporated 5.6 Electrical Characteristics NOTE The interfaces or signals described in Table 5-5 through Table 5-11 correspond to the interfaces or signals available in multiplexing mode 0 (Primary Function). All interfaces or signals multiplexed on the balls described in these tables have the same DC electrical characteristics, unless multiplexing involves a PHY and GPIO combination, in which case different DC electrical characteristics are specified for the different multiplexing modes (Functions). Table 5-5. I2C OPEN DRAIN DC Electrical Characteristics over recommended operating conditions (unless otherwise noted) PARAMETER MIN TYP MAX UNIT BALL NAMES in Mode 0: WKUP_I2C0_SCL / WKUP_I2C0_SDA / MCU_I2C0_SCL / MCU_I2C0_SDA BALL NUMBERS: AC7 / AD6 / AD7 / AD8 I2C STANDARD MODE / FAST MODE - VDDSHV0_WKUP = 1.8 V VIH High-level input threshold 0.7 × VDDSHV0_WKUP V VIL Low-level input threshold 0.3 × VDDSHV0_WKUP V VIHSS Input high-level Steady State(1) 0.80 × VDDSHV0_WKUP V VILSS Input low-level Steady State(2) 0.2 × VDDSHV0_WKUP V VHYS Hysteresis 0.1 × VDDSHV0_WKUP V IIN Input leakage current. This value represents the maximum current flowing in or out of the pin while the output driver is disabled and the input is swept from VSS to VDD. 12 µA IOZ Total leakage current through the driver/receiver combination, which may include an internal pull-up or pull-down. This value represents the maximum current flowing in or out of the pin while the output driver is disabled, the pull-up or pull-down is inhibited, and the input is swept from VSS to VDD. 12 µA VOL Low-level output voltage at 3-mA sink current 0.2 × VDDSHV0_WKUP V I2C STANDARD MODE / FAST MODE - VDDSHV0_WKUP = 3.3 V VIH High-level input voltage 0.7 × VDDSHV0_WKUP V VIL Low-level input voltage 0.3 × VDDSHV0_WKUP V VIHSS Input high-level Steady State(1) 0.85 × VDDSHV0_WKUP V VILSS Input low-level Steady State(2) 0.1 × VDDSHV0_WKUP V VHYS Hysteresis 0.05 × VDDSHV0_WKUP V IIN Input leakage current. This value represents the maximum current flowing in or out of the pin while the output driver is disabled and the input is swept from VSS to VDD. 80 µA |
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