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AM652X 数据表(PDF) 171 Page - Texas Instruments |
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AM652X 数据表(HTML) 171 Page - Texas Instruments |
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171 / 282 page ![]() Table 7-32. Switching Characteristics for DDRSS NO. PARAMETER DDR TYPE MODE MIN MAX UNIT 1 tc(DDR_CKP/ DDR_CKN) Cycle time, DDR_CKP and DDR_CKN DDR4 1.25 1.6 ns DDR_CK[1:0]P 1 DDR_CK[1:0]N Figure 7-38. DDRSS Memory Interface Clock Timing For more information, see section DDR Subsystem (DDRSS) in the device TRM. www.ti.com AM6548, AM6528, AM6526 SPRSP52B – DECEMBER 2019 – REVISED JUNE 2021 Copyright © 2021 Texas Instruments Incorporated Submit Document Feedback 171 Product Folder Links: AM6548 AM6528 AM6526 |
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