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STM32G0C1NET6 数据表(PDF) 122 Page - STMicroelectronics |
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STM32G0C1NET6 数据表(HTML) 122 Page - STMicroelectronics |
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122 / 159 page ![]() Electrical characteristics STM32G0C1xC/xE 122/159 DS13564 Rev 4 Figure 35. I2S master timing diagram (Philips protocol) 1. Based on characterization results, not tested in production. 2. LSB transmit/receive of the previously transmitted byte. No LSB transmit/receive is sent before the first byte. USART characteristics Unless otherwise specified, the parameters given in Table 77 for USART are derived from tests performed under the ambient temperature, fPCLKx frequency and supply voltage conditions summarized in Table 24: General operating conditions. The additional general conditions are: • OSPEEDRy[1:0] set to 10 (output speed) • capacitive load C = 30 pF • measurement points at CMOS levels: 0.5 x VDD Refer to Section 5.3.14: I/O port characteristics for more details on the input/output alternate function characteristics (NSS, CK, TX, and RX for USART). MSv39720V1 CPOL = 0 CPOL = 1 tc(CK) WS output SDreceive SDtransmit tw(CKH) tw(CKL) tsu(SD_MR) tv(SD_MT) th(SD_MT) th(WS) th(SD_MR) MSB receive Bitn receive LSB receive MSB transmit Bitn transmit LSB transmit tf(CK) tr(CK) tv(WS) LSB receive(2) LSB transmit(2) 10% 90% Table 77. USART characteristics Symbol Parameter Conditions Min Typ Max Unit fCK USART clock frequency Master mode - - 8 MHz Slave mode - - 21 |
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