SN250Q datasheet(116/130 Pages) STMICROELECTRONICS

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Functional description—application modules

SN250

116/130

7.7

Integrated voltage regulator

The SN250 integrates a low dropout regulator to provide an accurate core voltage at a low

quiescent current. Table 38 lists the specifications for the integrated voltage regulator. With

the regulator enabled, the pads supply voltage VDD_PADS is stepped down to the 1.8V

regulator output VREG_OUT. The VREG_OUT signal must be externally decoupled and

routed to the 1.8V core supply pins VDD_24MHZ, VDD_VCO, VDD_RF, VDD_IF,

VDD_PRE, VDD_SYNTH, VDD_PADSA, VDD_CORE, and VDD_FLASH.

In addition, the regulator can be operated with several configurations of external load

capacitors and decoupling capacitors. The SN250 Reference Design details the different

configurations recommended by ST.

Instead of using the internal regulator, an external regulator may be used. During deep

sleep this external regulator can be disabled from the SN250 with the open collector

REG_EN signal driving low. An external pull-up is required to release this signal to indicate

that 1.8V core supply should be provided. The REG_EN signal is available as an alternate

function on GPIO pins. For selecting alternate pin-functions, refer to Table 17.

Table 38.

Integrated voltage regulator specifications

Spec Point

Min.

Typ.

Max.

Units

Comments

Supply range for regulator

2.1

3.6

VDD_PADS

Regulated output

1.7

1.8

1.9

PSRR

− 40

@100kHz

Supplied current

Current

200

μA

No load current (bandgap,

regulator, feedback)

Quiescent current

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