ADE7169ACPF16 datasheet(136/140 Pages) AD

136 / 140 page

ADE7169F16

Preliminary Technical Data

Rev. PrD | Page 136 of 140

Bit Location

Bit

Addr.

Bit

Name

Default

Value

Description

0x87

This bit reflects the state of P0.7/SS/T1 pin. It can be written or read.

0x86

This bit reflects the state of P0.6/SCLK/T0 pin. It can be written or read.

0x85

This bit reflects the state of P0.5/MISO pin. It can be written or read.

0x84

This bit reflects the state of P0.4/MOSI/SDATA pin. It can be written or read.

0x83

CF2

This bit reflects the state of P0.3/CF2 pin. It can be written or read.

0x82

CF1

This bit reflects the state of P0.2/CF1 pin. It can be written or read.

0x81

This bit reflects the state of P0.1 pin. It can be written or read.

0x80

INT1

This bit reflects the state of P0.0/INT1/BCTRL pin. It can be written or read.

Table 139. Port 1 SFR (P1, 0x90)

Note: When an alternate function is chosen for a pin of this port, the bit controlling this pin should always be set

Bit Location

Bit

Addr.

Bit

Name

Default

value

Description

0x97

This bit reflects the state of P1.7 pin. It can be written or read.

0x96

This bit reflects the state of P1.6 pin. It can be written or read.

0x95

This bit reflects the state of P1.5 pin. It can be written or read.

0x94

This bit reflects the state of P1.4/T2 pin. It can be written or read.

0x93

T2EX

This bit reflects the state of P1.3/T2EX pin. It can be written or read.

0x92

This bit reflects the state of P1.2 pin. It can be written or read.

0x91

TxD

This bit reflects the state of P1.1/TxD pin. It can be written or read.

0x90

RxD

This bit reflects the state of P1.0/RxD pin. It can be written or read.

Table 140. Port 2 SFR (P2, 0xA0)

Note: When an alternate function is chosen for a pin of this port, the bit controlling this pin should always be set

Bit Location

Bit

Addr.

Bit

Name

Default

Value

Description

7 - 2

0x97 –

0x92

0x3F

These bits are unused and should be left set

0x91

P2.1

This bit reflects the state of P2.1 pin. It can be written or read.

0x90

P2.0

This bit reflects the state of P2.0 pin. It can be written or read.

Table 141. Port 0 Alternate Functions

No.

Alternate Function

Alternate Function Enable

BCTRL external battery control input

Set INT1PROG[2:0]=X01 in the Interrupt pins configuration

SFR (INTPR, 0xFF)

INT1 external interrupt

Set EX1 in the Interrupt Enable SFR (IE, 0xA8).

P0.0

INT1 wakeup from PSM2 operating mode

Set INT1PROG[2:0]=11X in the Interrupt pins configuration

SFR (INTPR, 0xFF)

P0.1

FP19 LCD Segment Pin

Set FP19EN in the LCD Segment Enable 2 SFR (LCDSEGE2,

0xED)

P0.2

CF1 ADE Calibration Frequency output

Clear the DISCF1 bit in the ADE energy measurement

internal MODE1 register (0x0B)

P0.3

CF2 ADE Calibration Frequency output

Clear the DISCF2 bit in the ADE energy measurement

internal MODE1 register (0x0B)

MOSI SPI Data line

Set the SCPS bit in the CFG SFR and set the SPIEN bit in the

SPI Configuration Register SFR (SPIMOD1, 0xE8).

P0.4

SDATA I2C Data line

Clear the SCPS bit in the Configuration SFR (CFG, 0xAF) and

set the I2CEN bit in the I2C Mode Register SFR (I2CMOD,

0xE8).

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