LS009.0
1997.01.16
RTL8029AS Preliminary
19
PL1
PL0
Medium Type
0
0
TP/CX auto-detect (10BaseT link test is enabled)
0
1
10BaseT with link test disabled
1
0
10Base5
1
1
10Base2
5
FCE
Flow Control Enable: The flow control is enabled in full-duplex mode
only.
4
PF
Pause Flag: Set when RTL8029AS is in backoff state because a pause
packet is received.
3-2
-
Not used
1-0
BS1-0
Select Boot ROM size
BS1
BS0
BROM size
0
0
No Boot ROM
0
1
8K Boot ROM
1
0
16K Boot ROM
1
1
32K Boot ROM
CONFIG3: RTL8029AS Configuration Register 3 (06H; Type=R except Bit[6,2:1]=R/W)
Bit
Symbol
Description
7
-
Unused
6
FUDUP
When this bit is set, RTL8029AS is set to the full-duplex mode which enables
simultaneously transmission and reception on the twisted-pair link to a full-
duplex Ethernet switching hub.
This feature not only increases the channel
bandwidth from 10 to 20 Mbps but also avoids the performance degrading
problem due to the channel contention characteristics of the Ethernet CSMA/CD
protocol.
5-4
LEDS1-0
These two bits select the outputs to LED2-0 pins.
LEDS0
LED0 Pin
0
LED_COL
1
LED_LINK
LEDS1
LED1 Pin
LED2 Pin
0
LED_RX
LED_TX
1
LED_CRS
MCSB
Please refer to section 6.4 for the behavior of LEDs.
The MCSB signal is defined to put the local buffer SRAM into standby mode
while DMA is not in progress and thus saves powers.
3
-
Reserved. Must not write a 1 to this bit.
2
SLEEP
This bit, when set, puts RTL8029AS into sleep mode.
In sleep mode, all LED signals (P.S. MCSB is not an LED signal) except
LED_BNC are forced high to turn off the LEDs. The RTL8029AS still handles
the network transmission and reception like in normal mode. The LED_BNC is
not affected by this bit.
This bit's power-up initial value is 0 and can be modified by software when
EEM1=EEM0=1.
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