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AT83SND1CXXX-ROTIL 数据表(PDF) 198 Page - ATMEL Corporation |
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AT83SND1CXXX-ROTIL 数据表(HTML) 198 Page - ATMEL Corporation |
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198 / 212 page ![]() 198 4109J–8051–10/06 AT8xC51SND1C 22.4.4 Analog to Digital Converter 22.4.4.1 Definition of symbols Table 165. Analog to Digital Converter Timing Symbol Definitions 22.4.4.2 Characteristics Table 166. Analog to Digital Converter AC Characteristics VDD = 2.7 to 3.3 V, TA = -40 to +85°C Notes: 1. AVDD= AVREFP= 3.0 V, AVSS= AVREFN= 0 V. ADC is monotonic with no missing code. 2. The differential non-linearity is the difference between the actual step width and the ideal step width (see Figure 22-21). 3. The integral non-linearity is the peak difference between the center of the actual step and the ideal transfer curve after appropriate adjustment of gain and offset errors (see Figure 22-21). 4. The offset error is the absolute difference between the straight line which fits the actual trans- fer curve (after removing of gain error), and the straight line which fits the ideal transfer curve (see Figure 22-21). 5. The gain error is the relative difference in percent between the straight line which fits the actual transfer curve (after removing of offset error), and the straight line which fits the ideal transfer curve (see Figure 22-21). Signals Conditions C Clock H High E Enable (ADEN bit) L Low S Start Conversion (ADSST bit) Symbol Parameter Min Max Unit T CLCL Clock Period 4 μs T EHSH Start-up Time 4 μs T SHSL Conversion Time 11·T CLCL μs DLe Differential non- linearity error (1)(2) 1LSB ILe Integral non- linearity errorss (1)(3) 2LSB OSe Offset error (1)(4) 4LSB Ge Gain error (1)(5) 4LSB |
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