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M750000004 数据表(PDF) 121 Page - SPANSION |
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M750000004 数据表(HTML) 121 Page - SPANSION |
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121 / 129 page ![]() January 14, 2004 Am75PDL191CHHa/Am75PDL193CHHa 119 ADV ANCE I N FO RMAT I O N ERASE AND PROGRAMMING PERFORMANCE Notes: 1. Typical program and erase times assume the following conditions: 25 °C, 3.0 V V CC, 1,000,000 cycles. Additionally, programming typicals assume checkerboard pattern. 2. Under worst case conditions of 90 °C, V CC = 2.7 V, 1,000,000 cycles. 3. The typical chip programming time is considerably less than the maximum chip programming time listed, since most bytes program faster than the maximum program times listed. 4. In the pre-programming step of the Embedded Erase algorithm, all bytes are programmed to 00h before erasure. 5. System-level overhead is the time required to execute the two- or four-bus-cycle sequence for the program command. See Table 11 for further information on command definitions. 6. The device has a minimum erase and program cycle endurance of 1,000,000 cycles. LATCHUP CHARACTERISTICS Note: Includes all pins except V CC. Test conditions: VCC = 3.0 V, one pin at a time. DATA RETENTION Parameter Typ (Note 1) Max (Note 2) Unit Comments Sector Erase Time 0.4 5 sec Excludes 00h programming prior to erasure (Note 4) Chip Erase Time 56 sec Byte Program Time 5 150 µs Excludes system level overhead (Note 5) Accelerated Byte/Word Program Time 4 120 µs Word Program Time 7 210 µs Chip Program Time (Note 3) Word Mode 28 84 sec Description Min Max Input voltage with respect to V SS on all pins except I/O pins (including A9, OE#, and RESET#) –1.0 V 12.5 V Input voltage with respect to V SS on all I/O pins –1.0 V V CC + 1.0 V V CC Current –100 mA +100 mA Parameter Description Test Conditions Min Unit Minimum Pattern Data Retention Time 150 °C10 Years 125 °C20 Years |
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