ST10F269Z2T3 datasheet(119/184 Pages) STMICROELECTRONICS

119 / 184 page

ST10F269

18 - SYSTEM RESET

119/184

Depending on the delay of the next applied reset,

the MCU can enter a synchronous reset or an

asynchronous reset. If RPD pin is below 2.5V an

asynchronous reset starts, if RPD pin is above

2.5V a synchronous reset starts. (See Section

18.1 - and Section 18.2 -).

Note that an internal pull-down is connected to

RPD pin and can drive a 100

µA to 200µA current.

This Pull-down is turned on when RSTIN pin is

low.

To properly use the bidirectional reset features,

the schematic (or equivalent) of Figure 60 must be

implemented. R1-C1 only work for power-on or

manual reset in the same way as explained

previously. D1 diode brings a faster discharge of

capacitor

power-off

during

repetitive

switch-on / switch-off sequences. D2

diode

performs an OR-wired connection, it can be

replaced with an open drain buffer. R2 resistor

may be added to increase the pull-up current to

the open drain in order to get a faster rise time on

RSTIN pin when bidirectional function is activated.

The start-up configurations and some system

features are selected on reset sequences as

described in Table 38 and Table 39.

Table 38

describes

what

the

system

configuration latched on PORT0 in the five

different reset ways. Table 39 summarizes the

state of bits of PORT0

latched

RP0H,

SYSCON, BUSCON0 registers.

Figure 58 : Internal (simplified) Reset Circuitry.

RSTOUT

EINIT Instruction

Trigger

Clr

Clock

Reset State

Machine

Internal

Reset

Signal

Reset Sequence

(512 CPU Clock Cycles)

SRST instruction

watchdog overflow

RSTIN

VDD

BDRSTEN

VDD

RPD

Weak pull-down

(~200

µA)

From/to Exit

Powerdown

Circuit

Asynchronous

Reset

Clr

Set

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