STM32F412RGU7 datasheet(199/201 Pages) STMICROELECTRONICS

199 / 201 page

DocID028087 Rev 7

199/201

STM32F412xE/G

Revision history

200

23-May-2017

Updated:

– Section 2: Description

– Table 2: STM32F412xE/G features and peripheral counts

– Section 3.19.1: Regulator ON

– Section 3.19.2: Regulator OFF

– Table 4: Regulator ON/OFF and internal power supply supervisor availability

– Table 15: Thermal characteristics

– Table 16: General operating conditions

– Table 21: Embedded reset and power control block characteristics

– Table from: Table 22: Typical and maximum current consumption, code with data

processing (ART accelerator disabled) running from SRAM - VDD = 1.7 V to

Table 35: Typical and maximum current consumptions in VBAT mode

– Figure 24: Typical VBAT current consumption (LSE and RTC ON/LSE oscillator

“low power” mode selection)

– Figure 25: Typical VBAT current consumption (LSE and RTC ON/LSE oscillator

“high drive” mode selection)

– Table 43: HSI oscillator characteristics

– Table 44: LSI oscillator characteristics

– Table 51: Flash memory endurance and data retention

– Table 55: Electrical sensitivities

– Table 57: I/O static characteristics

– Table 88: Asynchronous multiplexed PSRAM/NOR read timings

– Note 1. in Figure 62: WLCSP64 marking example (package top view)

– Note 1. in Figure 65: UFQFPN48 marking example (package top view)

– Note 1. in Figure 68: LQFP64 marking example (package top view)

– Note 1. in Figure 71: LQFP100 marking example (package top view)

– Note 1. in Figure 74: LQFP144 marking example (package top view)

– Note 1. in Figure 77: UFBGA100 marking example (package top view)

– Note 1. in Figure 80: UFBGA144 marking example (package top view)

– Table 110: Ordering information scheme

Table 111. Document revision history

Date

Revision

Changes

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