STM32F412RGT3 datasheet(123/201 Pages) STMICROELECTRONICS

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STM32F412xE/G

Electrical characteristics

166

6.3.16

I/O port characteristics

General input/output characteristics

Unless otherwise specified, the parameters given in Table 57 are derived from tests

performed under the conditions summarized in Table 16. All I/Os are CMOS and TTL

compliant.

Table 57. I/O static characteristics

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

VIL

FT, TC and NRST I/O input low

level voltage

1.7 V ≤ VDD ≤ 3.6 V

0.3VDD(1)

BOOT0 I/O input low level

voltage

1.75 V ≤ VDD ≤ 3.6 V,

-40 °C ≤ TA ≤ 125 °C

0.1VDD+0.1(2)

1.7 V ≤ VDD ≤ 3.6 V,

0 °C ≤ TA ≤ 125 °C

VIH

FT, TC and NRST I/O input high

level voltage(5)

1.7 V ≤ VDD ≤ 3.6 V

0.7VDD(1)

BOOT0 I/O input high level

voltage

1.75 V ≤ VDD ≤ 3.6 V,

-40 °C ≤ TA ≤ 125 °C

0.17VDD+0.7(2)

1.7 V ≤ VDD ≤ 3.6 V,

0 °C ≤ TA ≤ 125 °C

VHYS

FT, TC and NRST I/O input

hysteresis

1.7 V ≤ VDD ≤ 3.6 V

10% VDD(2)(3)

BOOT0 I/O input hysteresis

1.75 V ≤ VDD ≤ 3.6 V,

-40 °C ≤ TA ≤ 125 °C

0.1

1.7 V ≤ VDD ≤ 3.6 V,

0 °C ≤ TA ≤ 125 °C

Ilkg

I/O input leakage current (4)

VSS ≤ VIN ≤ VDD

±1

µA

I/O FT/TC input leakage current

(5)

VIN = 5 V

RPU

Weak pull-up

equivalent

resistor(6)

All pins

except for

PA10

(OTG_FS_ID)

VIN = VSS

PA10

(OTG_FS_ID)

RPD

Weak pull-down

equivalent

resistor(7)

All pins

except for

PA10

(OTG_FS_ID)

VIN = VDD

PA10

(OTG_FS_ID)

CIO(8) I/O pin capacitance

1. Guaranteed by test in production.

2. Guaranteed by design, not tested in production.

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