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STM32F429NET7TR 数据表(PDF) 116 Page - STMicroelectronics |
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STM32F429NET7TR 数据表(HTML) 116 Page - STMicroelectronics |
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116 / 231 page ![]() Electrical characteristics STM32F427xx STM32F429xx 116/231 DocID024030 Rev 6 6.3.9 External clock source characteristics High-speed external user clock generated from an external source In bypass mode the HSE oscillator is switched off and the input pin is a standard I/O. The external clock signal has to respect the Table 56: I/O static characteristics. However, the recommended clock input waveform is shown in Figure 27. The characteristics given in Table 37 result from tests performed using an high-speed external clock source, and under ambient temperature and supply voltage conditions summarized in Table 17. Low-speed external user clock generated from an external source In bypass mode the LSE oscillator is switched off and the input pin is a standard I/O. The external clock signal has to respect the Table 56: I/O static characteristics. However, the recommended clock input waveform is shown in Figure 28. The characteristics given in Table 38 result from tests performed using an low-speed external clock source, and under ambient temperature and supply voltage conditions summarized in Table 17. Table 37. High-speed external user clock characteristics Symbol Parameter Conditions Min Typ Max Unit fHSE_ext External user clock source frequency(1) 1- 50 MHz VHSEH OSC_IN input pin high level voltage 0.7VDD -VDD V VHSEL OSC_IN input pin low level voltage VSS -0.3VDD tw(HSE) tw(HSE) OSC_IN high or low time(1) 1. Guaranteed by design. 5- - ns tr(HSE) tf(HSE) OSC_IN rise or fall time(1) -- 10 Cin(HSE) OSC_IN input capacitance(1) -5 - pF DuCy(HSE) Duty cycle 45 - 55 % IL OSC_IN Input leakage current VSS ≤ VIN ≤ VDD -- ±1 µA |
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