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STM32L412R8I3 数据表(PDF) 149 Page - STMicroelectronics |
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STM32L412R8I3 数据表(HTML) 149 Page - STMicroelectronics |
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149 / 192 page  DS12469 Rev 4 149/192 STM32L412xx Electrical characteristics 163 Figure 30. Typical connection diagram using the ADC 1. Refer to Table 75: ADC characteristics for the values of RAIN and CADC. 2. Cparasitic represents the capacitance of the PCB (dependent on soldering and PCB layout quality) plus the pad capacitance (refer to Table 69: I/O static characteristics for the value of the pad capacitance). A high Cparasitic value will downgrade conversion accuracy. To remedy this, fADC should be reduced. 3. Refer to Table 69: I/O static characteristics for the values of Ilkg. General PCB design guidelines Power supply decoupling should be performed as shown in Figure 16: Power supply scheme. The 10 nF capacitor should be ceramic (good quality) and it should be placed as close as possible to the chip. |
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