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STM32L412RBU6TR 数据表(PDF) 137 Page - STMicroelectronics |
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STM32L412RBU6TR 数据表(HTML) 137 Page - STMicroelectronics |
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137 / 192 page  DS12469 Rev 4 137/192 STM32L412xx Electrical characteristics 163 6.3.18 Analog-to-Digital converter characteristics Unless otherwise specified, the parameters given in Table 75 are preliminary values derived from tests performed under ambient temperature, fPCLK frequency and VDDA supply voltage conditions summarized in Table 21: General operating conditions. Note: It is recommended to perform a calibration after each power-up. Table 75. ADC characteristics(1) (2) Symbol Parameter Conditions Min Typ Max Unit VDDA Analog supply voltage - 1.62 - 3.6 V VREF+ Positive reference voltage VDDA ≥ 2 V 2 - VDDA V VDDA < 2 V VDDA V VREF- Negative reference voltage -VSSA V fADC ADC clock frequency Range 1 0.14 - 80 MHz Range 2 0.14 - 26 fs Sampling rate for FAST channels Resolution = 12 bits - - 5.33 Msps Resolution = 10 bits - - 6.15 Resolution = 8 bits - - 7.27 Resolution = 6 bits - - 8.88 Sampling rate for SLOW channels Resolution = 12 bits - - 4.21 Resolution = 10 bits - - 4.71 Resolution = 8 bits - - 5.33 Resolution = 6 bits - - 6.15 fTRIG External trigger frequency fADC = 80 MHz Resolution = 12 bits - - 5.33 MHz Resolution = 12 bits - - 15 1/fADC VCMIN Input common mode Differential mode (VREF++ VREF-)/2 - 0.18 (VREF++ VREF-)/2 (VREF++ VREF-)/2 + 0.18 V VAIN (3) Conversion voltage range(2) -0 - VREF+ V RAIN External input impedance - - - 50 kΩ CADC Internal sample and hold capacitor -- 5 - pF tSTAB Power-up time - 1 conversion cycle tCAL Calibration time fADC = 80 MHz 1.45 µs -116 1/fADC |
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