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STM32L412R8Y6PTR 数据表(PDF) 191 Page - STMicroelectronics |
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STM32L412R8Y6PTR 数据表(HTML) 191 Page - STMicroelectronics |
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191 / 192 page ![]() DS12469 Rev 4 191/192 STM32L412xx Revision history 191 9 Revision history Table 105. Document revision history Date Revision Changes 02-Oct-2018 1 Initial release. 18-Oct-2018 2 Updated: – Features – Table 25: Current consumption in Run and Low-power run modes, code with data processing running from Flash, ART enable (Cache ON Prefetch OFF), Table 27: Current consumption in Run and Low-power run modes, code with data processing running from Flash, ART disable, Table 29: Current consumption in Run and Low-power run modes, code with data processing running from SRAM1, Table 40: Current consumption in Sleep and Low-power sleep modes, Flash ON, Table 42: Current consumption in Low- power sleep modes, Flash in power-down, Table 43: Current consumption in Stop 2 mode, Table 48: Current consumption in VBAT mode, Table 49: Peripheral current consumption 03-Dec-2018 3 Updated Table 46: Current consumption in Standby mode, Table 22: Operating conditions at power-up / power-down, Table 23: Embedded reset and power control block characteristics, Table 65: EMI characteristics. Removed Figure 5: STM32L412Vx, external SMPS device, LQFP100 pinout 18-Dec-2018 4 Updated Table 99: WLCSP - 36 balls, 2.58 x 3.07 mm, 0.4 mm pitch, wafer level chip scale mechanical data. |
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