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AM261...ZCZ 数据表(PDF) 161 Page - Texas Instruments |
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AM261...ZCZ 数据表(HTML) 161 Page - Texas Instruments |
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161 / 218 page  MODE OSPI_PHY_CONFIGURATION_REG BIT FIELD DELAY VALUE 3.3V PHY_CONFIG_TX_DLL_DELAY_FLD 0x2F Receive 1.8V, Internal PHY Loopback PHY_CONFIG_RX_DLL_DELAY_FLD 0x40 3.3V, Internal PHY Loopback PHY_CONFIG_RX_DLL_DELAY_FLD 0x32 1.8V, External Board Loopback PHY_CONFIG_RX_DLL_DELAY_FLD 0x0 3.3V, External Board Loopback PHY_CONFIG_RX_DLL_DELAY_FLD 0x0 6.11.5.13.2.3.1.2 OSPI1 Timing Requirements - PHY SDR Mode NO. PARAMETER DESCRIPTION MODE MIN MAX UNIT O19 tsu(D-CLK) Setup time, OSPI_D[7:0] valid before active OSPI_CLK edge 1.8V, SDR with Internal PHY Loopback 6 ns 3.3V, SDR with Internal PHY Loopback 7 ns O20 th(CLK-D) Hold time, OSPI_D[7:0] valid after active OSPI_CLK edge 1.8V, SDR with Internal PHY Loopback 0.25 ns 3.3V, SDR with Internal PHY Loopback 0 ns O21 tsu(D-LBCLK) Setup time, OSPI_D[7:0] valid before active OSPI_DQS edge 1.8V, SDR with External Board Loopback 6 ns 3.3V, SDR with External Board Loopback 7 ns O22 th(LBCLK-D) Hold time, OSPI_D[7:0] valid after active OSPI_DQS edge 1.8V, SDR with External Board Loopback 2 ns 3.3V, SDR with External Board Loopback 2 ns tO20t O19 OSPI_CLK OSPI_D[i:0] Figure 6-56. OSPI Timing Requirements – PHY SDR with Internal PHY Loopback tO22t O21 OSPI_DQS OSPI_D[i:0] Figure 6-57. OSPI Timing Requirements – PHY SDR with External Board Loopback www.ti.com AM2612, AM2611, AM2611-Q1, AM2612-Q1 SPRSPA7C – SEPTEMBER 2024 – REVISED JULY 2025 Copyright © 2025 Texas Instruments Incorporated Submit Document Feedback 161 Product Folder Links: AM2612 AM2611 AM2611-Q1 AM2612-Q1 |
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