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AM261...ZFG 数据表(PDF) 174 Page - Texas Instruments |
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AM261...ZFG 数据表(HTML) 174 Page - Texas Instruments |
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174 / 218 page  6.11.5.14.4 PRU-ICSS Industrial Ethernet Peripheral (IEP) 6.11.5.14.4.1 PRU-ICSS IEP Timing Conditions PARAMETER MIN MAX UNIT INPUT CONDITIONS SRI Input Slew Rate 1 3 V/ns OUTPUT CONDITIONS CL Output Load Capacitance 1 7 pF 6.11.5.14.4.2 PRU-ICSS IEP Timing Requirements - Input Validated with SYNCx NO. PARAMETER DESCRIPTION MIN MAX UNIT PRIEP1 tw(EDC_SYNCx_OUTL) Pulse duration, EDC_SYNCx_OUT Low –2 + 20P(1) ns PRIEP2 tw(EDC_SYNCx_OUTH) Pulse duration, EDC_SYNCx_OUT High –2 + 20P(1) ns PRIEP3 tsu(EDIO_DATA_IN- EDC_SYNCx_OUT Setup time, EDIO_DATA_IN valid before EDC_SYNCx_OUT active edge 20 ns PRIEP4 th(EDC_SYNCx_OUT- EDIO_DATA_IN) Hold time, EDIO_DATA_IN valid after EDC_SYNCx_OUT active edge 20 ns (1) P = PRU-ICSS IEP clock source period. EDC_SYNC_OUTx PRIEP4 PRIEP2 PRIEP3 EDIO_DATA_IN[7:0] PRU_IEP_TIMING_01 PRIEP1 Figure 6-75. PRU-ICSS IEP SYNC Timing Requirements 6.11.5.14.4.3 PRU-ICSS IEP Timing Requirements - Digital IOs NO. PARAMETER DESCRIPTION MIN MAX UNIT IEPIO1 tw(EDIO_OUTVALIDL) Pulse duration, EDIO_OUTVALID Low –2 + 14P(1) ns IEPIO2 tw(EDIO_OUTVALIDH) Pulse duration, EDIO_OUTVALID High –2 + 32P(1) ns IEPIO3 td(EDIO_OUTVALID- EDIO_DATA_OUT) Delay time, EDIO_OUTVALID to EDIO_DATA OUT 0 18P(1) ns IEPIO4 tsk(EDIO_DATA_OUT) EDIO_DATA_OUT skew 6 ns (1) P = PRU-ICSS IEP clock source period. EDIO_DATA_OUT PRU_EDIO_DATA_OUT_TIMING_00 IEPIO4 Figure 6-76. PRU-ICSS IEP Digital IOs Timing Requirements AM2612, AM2611, AM2611-Q1, AM2612-Q1 SPRSPA7C – SEPTEMBER 2024 – REVISED JULY 2025 www.ti.com 174 Submit Document Feedback Copyright © 2025 Texas Instruments Incorporated Product Folder Links: AM2612 AM2611 AM2611-Q1 AM2612-Q1 |
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