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T89C51CC02CA-RATIM 数据表(PDF) 110 Page - ATMEL Corporation |
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T89C51CC02CA-RATIM 数据表(HTML) 110 Page - ATMEL Corporation |
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110 / 145 page  110 T89C51CC02 4126D–CAN–05/03 PCA Registers Table 89. CMOD Register CMOD (S:D9h) PCA Counter Mode Register Reset Value = 0XXX X000b 765 43210 CIDL - - - - CPS1 CPS0 ECF Bit Number Bit Mnemonic Description 7CIDL PCA Counter Idle Control bit Clear to let the PCA run during Idle mode. Set to stop the PCA when Idle mode is invoked. 6- Reserved The value read from this bit is indeterminate. Do not set this bit. 5- Reserved The value read from this bit is indeterminate. Do not set this bit. 4- Reserved The value read from this bit is indeterminate. Do not set this bit. 3- Reserved The value read from this bit is indeterminate. Do not set this bit. 2 CPS1 EWC Count Pulse Select bits CPS1 CPS0 Clock source 0 0 Internal Clock, FPca/6 0 1 Internal Clock, FPca/2 1 0 Timer 0 overflow 1 1 External clock at ECI/P1.2 pin (Max. Rate = FPca/4) 1 CPS0 0ECF Enable PCA Counter Overflow Interrupt bit Clear to disable CF bit in CCON register to generate an interrupt. Set to enable CF bit in CCON register to generate an interrupt. |
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