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H8S/2240 数据表(PDF) 468 Page - Renesas Technology Corp

部件名 H8S/2240
功能描述  Renesas 16-Bit Single-Chip Microcomputer H8S Family / H8S/2200 Series
PDF  818 Pages
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制造商  RENESAS [Renesas Technology Corp]
网页  http://www.renesas.com
标志 RENESAS - Renesas Technology Corp

H8S/2240 数据表(HTML) 468 Page - Renesas Technology Corp

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Section 12 Serial Communication Interface (SCI)
Rev.3.00 Mar. 26, 2007 Page 426 of 772
REJ09B0355-0300
The BRR setting is found from the following formulas.
Asynchronous mode:
N =
φ
64
× 22n–1 × B
× 106 – 1
Clocked synchronous mode:
N =
φ
8
× 22n–1 × B
× 106 – 1
Where B: Bit rate (bit/s)
N: BRR setting for baud rate generator (0
≤ N ≤ 255)
φ: Operating frequency (MHz)
n: Baud rate generator input clock (n = 0 to 3)
(See the table below for the relation between n and the clock.)
SMR Setting
n
Clock
CKS1
CKS0
0
φ
00
1
φ/4
0
1
2
φ/16
1
0
3
φ/64
1
1
The bit rate error in asynchronous mode is found from the following formula:
Error (%) = {
φ × 106
(N + 1)
× B × 64 × 22n–1
– 1
} × 100



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