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H8S/2240 数据表(PDF) 473 Page - Renesas Technology Corp |
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H8S/2240 数据表(HTML) 473 Page - Renesas Technology Corp |
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473 / 818 page ![]() Section 12 Serial Communication Interface (SCI) Rev.3.00 Mar. 26, 2007 Page 431 of 772 REJ09B0355-0300 12.2.10 Module Stop Control Register (MSTPCR) 15 0 R/W Bit Initial value R/W : : : 14 0 R/W 13 1 R/W 12 1 R/W 11 1 R/W 10 1 R/W 9 1 R/W 8 1 R/W 7 1 R/W 6 1 R/W 5 1 R/W 4 1 R/W 3 1 R/W 2 1 R/W 1 1 R/W 0 1 R/W MSTPCRH MSTPCRL MSTPCR is a 16-bit readable/writable register that performs module stop mode control. When the corresponding bit of bits MSTP7 to MSTP5 is set to 1, SCI operation stops at the end of the bus cycle and a transition is made to module stop mode. For details, see section 18.5, Module Stop Mode. MSTPCR is initialized to H'3FFF by a reset and in hardware standby mode. It is not initialized in software standby mode. Bit 7—Module Stop (MSTP7): Specifies the SCI channel 2 module stop mode. Bit 7 MSTP7 Description 0 SCI channel 2 module stop mode cleared 1 SCI channel 2 module stop mode set (Initial value) Bit 6—Module Stop (MSTP6): Specifies the SCI channel 1 module stop mode. Bit 6 MSTP6 Description 0 SCI channel 1 module stop mode cleared 1 SCI channel 1 module stop mode set (Initial value) Bit 5—Module Stop (MSTP5): Specifies the SCI channel 0 module stop mode. Bit 5 MSTP5 Description 0 SCI channel 0 module stop mode cleared 1 SCI channel 0 module stop mode set (Initial value) |
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