H8SSLASH2240 datasheet(479/818 Pages) RENESAS

479 / 818 page

Section 12 Serial Communication Interface (SCI)

Rev.3.00 Mar. 26, 2007 Page 437 of 772

REJ09B0355-0300

Wait

Start initialization

Set data transfer format in

SMR and SCMR

[1]

Set CKE1 and CKE0 bits in SCR

(TE, RE bits 0)

Yes

Set value in BRR

Clear TE and RE bits in SCR to 0

[2]

[3]

Set TE and RE* bits in

SCR to 1, and set RIE, TIE, TEIE,

and MPIE bits

[4]

1-bit interval elapsed?

[1] Set the clock selection in SCR.

Be sure to clear bits RIE, TIE,

TEIE, and MPIE, and bits TE and

RE, to 0.

When the clock is selected in

asynchronous mode, it is output

immediately after SCR settings are

made.

[2] Set the data transfer format in SMR

and SCMR.

[3] Write a value corresponding to the

bit rate to BRR. Not necessary if an

external clock is used.

[4] Wait at least one bit interval, then

set the TE bit or RE bit in SCR to 1.

Also set the RIE, TIE, TEIE, and

MPIE bits.

Setting the TE and RE bits enables

the TxD and RxD pins to be used.

Note: * Perform this set operation with

the RxD pin in the 1 state. If the

RE bit is set to 1 with the RxD

pin in the 0 state, it may be

misinterpreted as a start bit.

Figure 12.4 Sample SCI Initialization Flowchart

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