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H8S/2240 数据表(PDF) 585 Page - Renesas Technology Corp

部件名 H8S/2240
功能描述  Renesas 16-Bit Single-Chip Microcomputer H8S Family / H8S/2200 Series
PDF  818 Pages
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制造商  RENESAS [Renesas Technology Corp]
网页  http://www.renesas.com
标志 RENESAS - Renesas Technology Corp

H8S/2240 数据表(HTML) 585 Page - Renesas Technology Corp

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Section 17 Clock Pulse Generator
Rev.3.00 Mar. 26, 2007 Page 543 of 772
REJ09B0355-0300
Section 17 Clock Pulse Generator
17.1
Overview
The H8S/2245 Group has a built-in clock pulse generator (CPG) that generates the system clock
(
φ), the bus master clock, and internal clocks.
The clock pulse generator consists of an oscillator circuit, a duty adjustment circuit, a medium-
speed clock divider, and a bus master clock selection circuit.
17.1.1
Block Diagram
Figure 17.1 shows a block diagram of the clock pulse generator.
EXTAL
XTAL
Duty
adjustment
circuit
Oscillator
circuit
Medium-
speed
divider
System clock to
φ pin
Internal clock
to supporting modules
Bus master clock
to CPU and DTC
φ/2 to φ/32
SCK2 to SCK0
SCKCR
Bus master
clock
selection
circuit
Figure 17.1 Block Diagram of Clock Pulse Generator



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