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H8S/2240 数据表(PDF) 688 Page - Renesas Technology Corp |
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H8S/2240 数据表(HTML) 688 Page - Renesas Technology Corp |
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688 / 818 page ![]() Appendix B Register Field Rev.3.00 Mar. 26, 2007 Page 646 of 772 REJ09B0355-0300 CRA—DTC Transfer Count Register A H'F800—H'FBFF DTC 15 Bit Initial value Read/Write : : : 14 13 12 11 10 9 8 76543210 CRAH CRAL Specifies the number of DTC data transfers Unde- fined — Unde- fined — Unde- fined — Unde- fined — Unde- fined — Unde- fined Unde- fined Unde- fined Unde- fined Unde- fined —— — — — Unde- fined Unde- fined Unde- fined Unde- fined Unde- fined —— — — — Unde- fined — CRB—DTC Transfer Count Register B H'F800—H'FBFF DTC 15 14 13 12 11 10 9 8 76543210 Specifies the number of DTC block data transfers Bit Initial value Read/Write : : : Unde- fined — Unde- fined — Unde- fined — Unde- fined — Unde- fined — Unde- fined Unde- fined Unde- fined Unde- fined Unde- fined —— — — — Unde- fined Unde- fined Unde- fined Unde- fined Unde- fined —— — — — Unde- fined — P1DDR—Port 1 Data Direction Register H'FEB0 Port 1 7 P17DDR 0 W 6 P16DDR 0 W 5 P15DDR 0 W 4 P14DDR 0 W 3 P13DDR 0 W 0 P10DDR 0 W 2 P12DDR 0 W 1 P11DDR 0 W Bit Initial value Read/Write : : : Specify input or output for individual port 1 pins |
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