H8SSLASH2240 datasheet(697/818 Pages) RENESAS

部件名	H8S/2240

功能描述	Renesas 16-Bit Single-Chip Microcomputer H8S Family / H8S/2200 Series

PDF	818 Pages

Scroll/Zoom	100%

制造商	RENESAS [Renesas Technology Corp]

网页	http://www.renesas.com

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697 / 818 page

Appendix B Register Field

Rev.3.00 Mar. 26, 2007 Page 655 of 772

REJ09B0355-0300

BCRL—Bus Control Register L

H'FED5

Bus Controller

BRLE

R/W

BREQOE

R/W

EAE

R/W

—

R/W

—

R/W

WAITE

R/W

ASS

R/W

—

R/W

Bit

Initial value

Read/Write

Bus Release Enable

External bus release is disabled

External bus release is enabled

BREQO Pin Enable

BREQO output disabled

BREQO output enabled

External Addresses H'010000 to H'01FFFF Enable

Area Partition Unit Select

Area partition unit is 128 kbytes (1 Mbit)

Area partition unit is 2 Mbytes (16 Mbits)

WAIT Pin Enable

Wait input by

WAIT

pin disabled

Note: * Do not access a reserved area.

Wait input by

WAIT

pin enabled

On-chip ROM (H8S/2246 and H8S/2245) or a reserved

area (H8S/2244, H8S/2243, H8S/2242, and H8S/2241)

External addresses (in external expansion mode) or

reserved area* (in single-chip mode)

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