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H8S/2240 数据表(PDF) 243 Page - Renesas Technology Corp |
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H8S/2240 数据表(HTML) 243 Page - Renesas Technology Corp |
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243 / 818 page ![]() Section 7 Data Transfer Controller Rev.3.00 Mar. 26, 2007 Page 201 of 772 REJ09B0355-0300 Read Write Read Write Address φ DTC activation request DTC request Data transfer Data transfer Transfer information write Transfer information write Transfer information read Transfer information read Vector read Figure 7.12 DTC Operation Timing (Example of Chain Transfer) 7.3.10 Number of DTC Execution States Table 7.8 lists execution statuses for a single DTC data transfer, and table 7.9 shows the number of states required for each execution status. Table 7.8 DTC Execution Statuses Mode Vector Read I Register Information Read/Write J Data Read K Data Write L Internal Operations M Normal 1 6 1 1 3 Repeat 1 6 1 1 3 Block transfer 1 6 N N 3 Legend: N: Block size (initial setting of CRAH and CRAL) |
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