H8SSLASH2240 datasheet(258/818 Pages) RENESAS

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Section 8 I/O Ports

Rev.3.00 Mar. 26, 2007 Page 216 of 772

REJ09B0355-0300

8.2.3

Pin Functions

Port 1 pins also function as TPU I/O pins (TCLKA, TCLKB, TCLKC, TCLKD, TIOCA0,

TIOCB0, TIOCC0, TIOCD0, TIOCA1, TIOCB1, TIOCA2, and TIOCB2), and address output

pins (A

23 to A20). Port 1 pin functions are shown in table 8.3.

Table 8.3

Port 1 Pin Functions

Selection Method and Pin Functions

7 /TIOCB2/

TCLKD

The pin function is switched as shown below according to the combination of

the TPU channel 2 setting (by bits MD3 to MD0 in TMDR2, bits IOB3 to IOB0

in TIOR2, and bits CCLR2 to CCLR0 in TCR2), bits TPSC2 to TPSC0 in

TCR0, and bit P17DDR.

TPU Channel

2 Setting

Table Below (1)

Table Below (2)

P17DDR

—

Pin function

TIOCB2 output

7 input

7 output

TIOCB2 input*

TCLKD input*

Notes: 1. TIOCB2 input when input capture is set (IOB3 to IOB0 = B'10xx) in

normal operating mode (MD3 to MD0 = B'0000).

2. TCLKD input when the TCR0 setting is: TPSC2 to TPSC0 = B'111.

TCLKD input when channel 2 is set to phase counting mode (MD3

to MD0 = B'01xx).

TPU Channel

2 Setting

(2)

(1)

(2)

(1)

(2)

MD3 to MD0

B'0000, B'01xx

B'0010

B'0011

IOB3 to IOB0

B'0000

B'0100

B'1xxx

B'0001 to

B'0011

B'0101 to

B'0111

—

B'xx00

Other than B'xx00

CCLR2 to

CCLR0

————

Other

than

B'010

Output

function

—

Output

compare

output

——

PWM

mode 2

output

—

Legend: x: Don't care

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