H8SSLASH2240 datasheet(263/818 Pages) RENESAS

263 / 818 page

Section 8 I/O Ports

Rev.3.00 Mar. 26, 2007 Page 221 of 772

REJ09B0355-0300

Selection Method and Pin Functions

2/TIOCC0/

TCLKA/A

The pin function is switched as shown below according to the combination of

the operating mode, TPU channel 0 setting (by bits MD3 to MD0 in TMDR0,

bits IOC3 to IOC0 in TIOR0L, and bits CCLR2 to CCLR0 in TCR0), bits TPSC2

to TPSC0 in TCR0 to TCR2, and bit P12DDR.

Operating

Mode

Modes 1, 2, 3, 7*

Modes 4, 5, 6*

TPU Channel

0 Setting

Table

Below (1)

Table

Below (2)

Table

Below (1)

Table

Below (2)

P12DDR

—

Pin function

TIOCC0

output

input

output

TIOCC0

output

input

output

TIOCC0

input*

TIOCC0

input*

TCLKA input*

Notes: 1. Modes 2, 3, 6, and 7 cannot be used in the H8S/2240.

2. TIOCC0 input when input capture is set (IOC3 to IOC0 = B'10xx) in

normal operating mode (MD3 to MD0 = B'0000).

3. TCLKA input when the TCR0, TCR1, or TCR2 setting is: TPSC2 to

TPSC0 = B'100.

TCLKA input when channel 1 is set to phase counting mode (MD3

to MD0 = B'01xx).

TPU Channel

0 Setting

(2)

(1)

(2)

(1)

(2)

MD3 to MD0

B'0000

B'001x

B'0010

B'0011

IOC3 to IOC0

B'0000

B'0100

B'1xxx

B'0001 to

B'0011

B'0101 to

B'0111

B'xx00

Other than B'xx00

CCLR2 to

CCLR0

————

Other

than

B'101

Output

function

—

Output

compare

output

—

PWM

mode 1

output*

PWM

mode 2

output

—

Legend: x: Don't care

Note:

4. TIOCD0 output is disabled.

When BFA = 1 or BFB = 1 in TMDR0, output is disabled and

setting (2) applies.

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