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H8SX/1663 数据表(PDF) 514 Page - Renesas Technology Corp |
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H8SX/1663 数据表(HTML) 514 Page - Renesas Technology Corp |
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514 / 1158 page ![]() Section 9 I/O Ports Rev.1.00 Jun. 07, 2006 Page 462 of 1102 REJ09B0294-0100 9.2.7 Port B (1) PB7/SD φ The pin function is switched as shown below according to the combination of operating mode, EXPE bit, port function control register (PFCR), and the PB7DDR bit settings. Setting MCU Operating Mode I/O Port Module Name Pin Function SDRAM Mode PB7DDR Clock pulse generator SD φ output* 1 I/O port PB7 output 0 1 PB7 input (initial setting) 0 0 Note: * Valid in SDRAM mode (2) PB6/ CS6-D/(RD/WR-B) The pin function is switched as shown below according to the combination of operating mode, EXPE bit, bus controller register, port function control register (PFCR), and the PB6DDR bit settings. Setting I/O Port Module Name Pin Function Byte control SRAM Selection (RD/ WR)-B_OE CS6D_OE PB6DDR 1 RD/ WR-B output* 0 1 Bus controller CS6-D output* 0 0 1 PB6 output 0 0 0 1 I/O port PB6 input (initial setting) 0 0 0 0 Note: * Valid in external extended mode (EXPE = 1) |
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