H8SXSLASH1663 datasheet(758/1158 Pages) RENESAS

部件名	H8SX/1663

功能描述	Renesas 32-Bit CISC Microcomputer H8SX Family / H8SX/1600 Series

PDF	1158 Pages

Scroll/Zoom	100%

制造商	RENESAS [Renesas Technology Corp]

网页	http://www.renesas.com

标志

758 / 1158 page

Section 15 Serial Communication Interface (SCI, IrDA, CRC)

Rev.1.00 Jun. 07, 2006 Page 706 of 1102

REJ09B0294-0100

Table 15.12 shows the states of the SSR status flags and receive data handling when a receive

error is detected. If a receive error is detected, the RDRF flag retains its state before receiving

data. Reception cannot be resumed while a receive error flag is set to 1. Accordingly, clear the

ORER, FER, PER, and RDRF bits to 0 before resuming reception. Figure 15.12 shows a sample

flowchart for serial data reception.

Table 15.12 SSR Status Flags and Receive Data Handling

SSR Status Flag

RDRF*

ORER

FER

PER

Receive Data

Receive Error Type

Lost

Overrun error

Transferred to RDR

Framing error

Transferred to RDR

Parity error

Lost

Overrun error + framing error

Lost

Overrun error + parity error

Transferred to RDR

Framing error + parity error

Lost

Overrun error + framing error +

parity error

Note:

The RDRF flag retains the state it had before data reception.

H8SX/1663 数据表(PDF) 758 Page - Renesas Technology Corp