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H8SX/1663 数据表(PDF) 995 Page - Renesas Technology Corp |
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H8SX/1663 数据表(HTML) 995 Page - Renesas Technology Corp |
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995 / 1158 page ![]() Section 21 Flash Memory (0.18- µm F-ZTAT Version) Rev.1.00 Jun. 07, 2006 Page 943 of 1102 REJ09B0294-0100 (4) Receive Data Check The methods for checking of receive data are listed below. 1. Input frequency The received value of the input frequency is checked to ensure that it is within the range of minimum to maximum frequencies which matches the clock modes of the specified device. When the value is out of this range, an input-frequency error is generated. 2. Multiplication ratio The received value of the multiplication ratio or division ratio is checked to ensure that it matches the clock modes of the specified device. When the value is out of this range, an input- frequency error is generated. 3. Operating frequency error Operating frequency is calculated from the received value of the input frequency and the multiplication or division ratio. The input frequency is input to the LSI and the LSI is operated at the operating frequency. The expression is given below. Operating frequency = Input frequency × Multiplication ratio, or Operating frequency = Input frequency ÷ Division ratio The calculated operating frequency should be checked to ensure that it is within the range of minimum to maximum frequencies which are available with the clock modes of the specified device. When it is out of this range, an operating frequency error is generated. 4. Bit rate To facilitate error checking, the value (n) of clock select (CKS) in the serial mode register (SMR), and the value (N) in the bit rate register (BRR), which are found from the peripheral operating clock frequency ( φ) and bit rate (B), are used to calculate the error rate to ensure that it is less than 4%. If the error is more than 4%, a bit rate error is generated. The error is calculated using the following expression: Error (%) = {[ ] − 1} × 100 (N + 1) × B × 64 × 2(2×n − 1) φ × 106 When the new bit rate is selectable, the rate will be set in the register after sending ACK in response. The host will send an ACK with the new bit rate for confirmation and the boot program will response with that rate. Confirmation H'06 • Confirmation, H'06, (one byte): Confirmation of a new bit rate Response H'06 • Response, H'06, (one byte): Response to confirmation of a new bit rate |
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