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数据搜索系统，热门电子元器件搜索 |
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H8SX/1663R 数据表(PDF) 449 Page - Renesas Technology Corp |
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H8SX/1663R 数据表(HTML) 449 Page - Renesas Technology Corp |
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449 / 1504 page  Section 10 DMA Controller (DMAC) Rev. 2.00 Sep. 24, 2008 Page 417 of 1468 REJ09B0412-0200 Figure 10.16 shows examples when the extended repeat area function is used in block transfer mode. External memory Area specified by DSAR 1st block transfer 2nd block transfer H'23FFFE H'23FFFF H'240000 H'240001 H'240002 H'240003 H'240004 H'240005 H'240006 H'240007 H'240008 H'240009 H'240000 H'240001 H'240002 H'240003 H'240004 H'240005 H'240006 H'240007 H'240000 H'240001 H'240002 H'240003 H'240004 H'240000 H'240001 H'240005 H'240006 H'240007 Interrupt request generated Block transfer continued When the are represented by the lower three bits (eight bytes) of DSAR are specified as the extended repeat area (SARA4 to SARA0 = 3) and the block size in block transfer mode is specified to 5 (bits 23 to 16 in DTCR = 5). Figure 10.16 Example of Extended Repeat Area Function in Block Transfer Mode |
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