H8SXSLASH1663R datasheet(1301/1504 Pages) RENESAS

1301 / 1504 page

Section 28 Power-Down Modes

Rev. 2.00 Sep. 24, 2008 Page 1269 of 1468

REJ09B0412-0200

28.8.3

Pin State on Exit from Deep Software Standby Mode

In deep software standby mode, the ports retain the states that were held during software standby

mode. The internal of the LSI is initialized by an internal reset caused by deep software standby

mode, and the reset exception handling starts as soon as deep software standby mode is canceled.

The following shows the port states at this time.

(1)

Pins for address bus, bus control and data bus

Pins for the address bus, bus control signals (

CS0, AS, HWR, and LWR), and data bus operate

depending on the CPU.

(2)

Pins other than address bus, bus control and data bus pins

Whether the ports are initialized or retain the states that were held during software standby mode

can be selected by the IOKEEP bit.

• When IOKEEP = 0

Ports are initialized by an internal reset caused by deep software standby mode.

• When IOKEEP = 1

The port states that were held in deep software standby mode are retained regardless of the LSI

internal state though the internal of the LSI is initialized by an internal reset caused by deep

software standby mode. At this time, the port states that were held in software standby mode

are retained even if settings of I/O ports or peripheral modules are set. Subsequently, the

retained port states are released when the IOKEEP bit is cleared to 0 and operation is

performed according to the internal settings.

The IOKEEP bit is not initialized by an internal reset caused by canceling deep software standby

mode.

H8SX/1663R 数据表(PDF) 1301 Page - Renesas Technology Corp