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H8SX/1663R 数据表(PDF) 1466 Page - Renesas Technology Corp |
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H8SX/1663R 数据表(HTML) 1466 Page - Renesas Technology Corp |
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1466 / 1504 page ![]() Main Revisions and Additions in this Edition Rev. 2.00 Sep. 24, 2008 Page 1434 of 1468 REJ09B0412-0200 Item Page Revision (See Manual for Details) All Amended: Section and Figure numbers are amended due to the addition of the sections 5, Voltage Detection Circuit (LVD) Structure of the Rev. 2.00 1. Overview 2. CPU 3. MCU Operating Modes 4. Resets 5. Voltage Detection Circuit (LVD) 6. Exception Handling 7. Interrupt Controller 8. User Break Controller (UBC) 9. Bus Controller (BSC) 10. DMA Controller (DMAC) 11. EXDMA Controller (EXDMAC) 12. Data Transfer Controller (DTC) 13. I/O Ports 14. 16-Bit Timer Pulse Unit (TPU) 15. Programmable Pulse Generator (PPG) 16. 8-bit Timer (TMR) 17. Watch Dog Timer (WDT) 18. 32K Timer (TM32K) 19. Serial Communication Interface (SCI, IrDA, CRC) 20. USB Function Module (USB) 21. I 2C Bus Interface 2 (IIC2) 22. A/D Converter 23. D/A Converter 24. RAM 25. Flash Memory 26. Boundary Scan 27. Clock Pulse Generator 28. Power-Down Modes 29. List of Registers 30. Electrical Characteristics Appendix |
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