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M30620FCAFP 数据表(PDF) 272 Page - Renesas Technology Corp |
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M30620FCAFP 数据表(HTML) 272 Page - Renesas Technology Corp |
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272 / 615 page ![]() Appendix Standard Serial I/O Mode 1 (Flash Memory Version) Mitsubishi microcomputers M16C / 62A Group SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER 1-253 Status Register 1 (SRD1) Status register 1 indicates the status of serial communications, results from ID checks and results from check sum comparisons. It can be read after the SRD by writing the read status register command (7016). Also, status register 1 is cleared by writing the clear status register command (5016). Table 1.29.3 gives the definition of each status register 1 bit. “0016” is output when power is turned ON and the flag status is maintained even after the reset. Table 1.29.3. Status register 1 (SRD1) Boot Update Completed Bit (SR15) This flag indicates whether the control program was downloaded to the RAM or not, using the down- load function. Check Sum Match Bit (SR12) This flag indicates whether the check sum matches or not when a program, is downloaded for execu- tion using the download function. ID Check Completed Bits (SR11 and SR10) These flags indicate the result of ID checks. Some commands cannot be accepted without an ID check. Data Receive Time Out (SR9) This flag indicates when a time out error is generated during data reception. If this flag is attached during data reception, the received data is discarded and the microcomputer returns to the command wait state. SRD1 bits SR15 (bit7) SR14 (bit6) SR13 (bit5) SR12 (bit4) SR11 (bit3) SR10 (bit2) SR9 (bit1) SR8 (bit0) Status name Boot update completed bit Reserved Reserved Check sum match bit ID check completed bits Data receive time out Reserved Definition "1" "0" Update co mpleted - - Match 00 01 10 11 Not update - - Mismatch Normal operation - Not verified Verification mismatch Reserved Verified Time out - |
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