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M38041FEHKP 数据表(PDF) 132 Page - Renesas Technology Corp |
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M38041FEHKP 数据表(HTML) 132 Page - Renesas Technology Corp |
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132 / 387 page ![]() 2-8 APPLICATION 2.2 Interrupt Rev.1.00 Jan 14, 2005 REJ09B0212-0100Z 3804 Group (Spec.H) Fig. 2.2.2 Structure of Interrupt source selection register 2.2 Interrupt This paragraph explains the registers setting method and the notes relevant to the interrupt. 2.2.1 Memory map Fig. 2.2.1 Memory map of registers relevant to interrupt 003F16 Interrupt control register 1 (ICON1) Interrupt request register 2 (IREQ2) Interrupt request register 1 (IREQ1) 003E16 003D16 003C16 Interrupt edge selection register (INTEDGE) 003A16 Interrupt control register 2 (ICON2) 003916 Interrupt source selection register (INTSEL) 2.2.2 Relevant registers Interrupt source selection register b7 b6 b5 b4 b3 b2 b1 b0 Interrupt source selection register (INTSEL: address 003916) 0: INT0 interrupt 1: Timer Z interrupt b 0 1 4 2 3 5 6 7 Name 0 Functions At reset R W 0 0 0 0 0 0 INT0/Timer Z interrupt source selection bit (*1) 0: Serial I/O2 interrupt 1: Timer Z interrupt Serial I/O2/Timer Z interrupt source selection bit (*1) 0: INT4 interrupt 1: CNTR2 interrupt INT4/CNTR2 interrupt source selection bit 0: INT2 interrupt 1: I2C interrupt INT2/I2C interrupt source selection bit 0: CNTR0 interrupt 1: SCL, SDA interrupt CNTR0/SCL, SDA interrupt source selection bit (*2) 0: Serial I/O1 transmit interrupt 1: SCL, SDA interrupt Serial I/O1 transmit/ SCL, SDA interrupt source selection bit (*2) CNTR1/Serial I/O3 receive interrupt source selection bit AD converter/Serial I/O3 transmit interrupt source selection bit *1: Do not write 1 to these bits simultaneously. *2: Do not write 1 to these bits simultaneously. 0 0: CNTR1 interrupt 1: Serial I/O3 receive interrupt 0: A/D converter interrupt 1: Serial I/O3 transmit interrupt |
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