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M38043FEHKP 数据表(PDF) 130 Page - Renesas Technology Corp

部件名 M38043FEHKP
功能描述  8-BIT CISC SINGLE-CHIP MICROCOMPUTER 740 FAMILY / 38000 SERIES
PDF  387 Pages
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制造商  RENESAS [Renesas Technology Corp]
网页  http://www.renesas.com
标志 RENESAS - Renesas Technology Corp

M38043FEHKP 数据表(HTML) 130 Page - Renesas Technology Corp

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2-6
Rev.1.00 Jan 14, 2005
REJ09B0212-0100Z
APPLICATION
3804 Group (Spec.H)
2.1 I/O port
2.1.5 Notes on I/O port
(1)
Notes in standby state
In standby state✽1 for low-power dissipation, do not make input levels of an I/O port “undefined”,
especially for I/O ports of the N-channel open-drain.
Pull-up (connect the port to VCC) or pull-down (connect the port to VSS) these ports through a
resistor.
When determining a resistance value, note the following points:
• External circuit
• Variation of output levels during the ordinary operation
When using built-in pull-up resistor, note on varied current values:
• When setting as an input port : Fix its input level
• When setting as an output port : Prevent current from flowing out to external
q Reason
Even when setting as an output port with its direction register, when the content of the port latch
is “1”, the transistor becomes the OFF state, which causes the ports to be the high-impedance
state. Note that the level becomes “undefined” depending on external circuits.
Accordingly, the potential which is input to the input buffer in a microcomputer is unstable in the
state that input levels of an I/O port are “undefined”. This may cause power source current.
✽1 standby state: stop mode by executing STP instruction
wait mode by executing WIT instruction
(2)
Modifying output data with bit managing instruction
When the port latch of an I/O port is modified with the bit managing instruction✽2, the value of the
unspecified bit may be changed.
q Reason
The bit managing instructions are read-modify-write form instructions for reading and writing data
by a byte unit. Accordingly, when these instructions are executed on a bit of the port latch of an
I/O port, the following is executed to all bits of the port latch.
•As for bit which is set for input port:
The pin state is read in the CPU, and is written to this bit after bit managing.
•As for bit which is set for output port:
The bit value is read in the CPU, and is written to this bit after bit managing.
Note the following:
•Even when a port which is set as an output port is changed for an input port, its port latch holds
the output data.
•As for a bit of which is set for an input port, its value may be changed even when not specified
with a bit managing instruction in case where the pin state differs from its port latch contents.
✽2 Bit managing instructions: SEB and CLB instructions



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