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M38047FEHKP 数据表(PDF) 138 Page - Renesas Technology Corp

部件名 M38047FEHKP
功能描述  8-BIT CISC SINGLE-CHIP MICROCOMPUTER 740 FAMILY / 38000 SERIES
PDF  387 Pages
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制造商  RENESAS [Renesas Technology Corp]
网页  http://www.renesas.com
标志 RENESAS - Renesas Technology Corp

M38047FEHKP 数据表(HTML) 138 Page - Renesas Technology Corp

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2-14
APPLICATION
2.2 Interrupt
Rev.1.00 Jan 14, 2005
REJ09B0212-0100Z
3804 Group (Spec.H)
(1)
Processing upon acceptance of interrupt request
Upon acceptance of an interrupt request, the following operations are automatically performed.
➀The processing being executed is stopped.
➁The contents of the program counter and the processor status register are pushed onto the stack
area. Figure 2.2.9 shows the changes of the stack pointer and the program counter upon acceptance
of an interrupt request.
➂Concurrently with the push operation, the jump destination address (the beginning address of the
interrupt processing routine) of the occurring interrupt stored in the vector address is set in the
program counter, then the interrupt processing routine is executed.
➃After the interrupt processing routine is started, the corresponding interrupt request bit is automatically
cleared to “0”. The interrupt disable flag is set to “1” so that multiple interrupts are disabled.
Accordingly, for executing the interrupt processing routine, it is necessary to set the jump destination
address in the vector area corresponding to each interrupt.
Fig. 2.2.9 Changes of stack pointer and program counter upon acceptance of interrupt request
Interrupt disable flag = “0”
Program counter
Stack pointer
Program counter (low-order)
Program counter (high-order)
PCL
PCH
(S)
S
Program counter
Stack pointer
PCL
PCH
(S) – 3
S
Vector address
(from Interrupt vector area)
Interrupt disable flag = “1”
Interrupt
request is
accepted
Stack area
(S)
Processor status register
Program counter (low-order)
Program counter (high-order)
(S)
(s) – 3
Stack area



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