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M38047FEHKP 数据表(PDF) 168 Page - Renesas Technology Corp |
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M38047FEHKP 数据表(HTML) 168 Page - Renesas Technology Corp |
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168 / 387 page ![]() 2-44 APPLICATION 2.3 Timer Rev.1.00 Jan 14, 2005 REJ09B0212-0100Z 3804 Group (Spec.H) Fig. 2.3.28 Control procedure (2) RTI (A) Measurement result (high-order 8 bits) (A) Measurement result (low-order 8 bits) TZH (A) TZL (A) FFFF16 000016 Count start of Timer Z T1 value: Valid CNTR2 T1 T2 FFFF16 000016 CNTR2 T1 T2 CNTR2 interrupt process routine (Note 1) CLT (Note 2) CLD (Note 3) Push registers to stack Pop registers Notes 2: When using Index X mode flag (T) 3: When using Decimal mode flag (D) •Pushing registers used in interrupt process routine •Popping registers pushed to stack •Count value read and storing it to RAM Note 1: The first value becomes invalid depending on start timing of Timer Z count shown by the following figure. Process it by software as necessary. [ Example 1] • Start Timer Z count when CNTR2 input level is “L”. (CNTR2 input level can be checked by reading the contents of sharing port P47 register.) CNTR2 interrupt T2 value: Valid CNTR2 interrupt [ Example 2] • Start Timer Z count when CNTR2 input level is “H”. Invalidate the first CNTR2 interrupt after start of Timer Z count. Count start of Timer z T1 value: Invalid CNTR2 interrupt CNTR2 interrupt T2 value: Valid |
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