R5F5630ECDFB datasheet(148/165 Pages) RENESAS

148 / 165 page

R01DS0060EJ0100 Rev.1.00

Page 148 of 168

Sep 13, 2011

RX630 Group

5. Electrical Characteristics

Note: • When A/D conversion is done during access to the external bus, the accuracy may degrade.

In this case, repeat conversion several times and calculate by software the average of the converted values, excluding the

maximum and minimum values.

Note 1. The conversion time includes the sampling time and the comparison time. As the test conditions, the number of sampling states

is indicated.

Note 2. The value in parentheses indicates the sampling time.

Table 5.22

12-Bit A/D Conversion Characteristics

Conditions: VCC = AVCC0 = VCC_USB = 2.7 to 3.6 V, VREFH/VREFH0 = 2.7 V to AVCC0

VSS = AVSS0 = VREFL/VREFL0 = VSS_USB = 0 V

PCLK = 8 to 50 MHz

Ta = Topr

Item

Min.

Typ.

Max.

Unit

Test

Conditions

Resolution

Bit

Conversion

time*1

(Operation

at PCLK =

50 MHz)

AN0 to AN7

Permissible signal source impedance

(max.) = 1.0 k

Ω

1.0 (0.4)*2

—

µs

Sampling

in 20

states

Other channels

Permissible signal source impedance

(max.) = 1.0 k

Ω, AVCC

 3.0 V

2.0 (1.4)*2

—

µs

Sampling

in 70

states

Permissible signal source impedance

(max.) = 1.0 k

Ω, AVCC

 2.7 V

5.6 (5.0)*2

—

µs

Sampling

in 250

states

Analog input capacitance

—

Offset error

—

±2.0

±7.5

LSB

Full-scale error

—

±2.0

±7.5

LSB

Quantization error

—

±0.5

—

LSB

Absolute accuracy

—

±2.5

±8.0

LSB

DNL differential nonlinearity error

—

±2.0

±4.0

LSB

INL integral nonlinearity error

—

±2.0

±4.0

LSB

Table 5.23

A/D Internal Reference Voltage Characteristics

Conditions: VCC = AVCC0 = VCC_USB = 2.7 to 3.6 V, VREFH/VREFH0 = 2.7 V to AVCC0

VSS = AVSS0 = VREFL/VREFL0 = VSS_USB = 0 V

PCLK = 8 to 50 MHz

Ta = Topr

Item

Min.

Typ.

Max.

Unit

Test

Conditions

A/D Internal reference voltage

1.45

1.50

1.55

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