OPTION_REG datasheet(176/222 Pages) MICROCHIP

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MCP19111

DS22331A-page 176

 2013 Microchip Technology Inc.

27.5.13.1

Bus Collision During a Start

Condition

During a Start condition, a bus collision occurs if:

SDA or SCL are sampled low at the beginning of

the Start condition (Figure 27-25).

SCL is sampled low before SDA is asserted low

(Figure 27-26).

During a Start condition, both the SDA and the SCL

pins are monitored.

If the SDA pin is already low, or the SCL pin is already

low, then all of the following occur:

• the Start condition is aborted

• the BCLIF flag is set

•

the MSSP module is reset to its Idle state

(Figure 27-25).

The Start condition begins with the SDA and SCL pins

deasserted. When the SDA pin is sampled high, the

Baud Rate Generator is loaded and counts down. If the

SCL pin is sampled low while SDA is high, a bus

collision occurs because it is assumed that another

master is attempting to drive a data ‘1’ during the Start

condition.

If the SDA pin is sampled low during this count, the

BRG is reset and the SDA line is asserted early

(Figure 27-27). If, however, a ‘1’ is sampled on the SDA

pin, the SDA pin is asserted low at the end of the BRG

count. The Baud Rate Generator is then reloaded and

counts down to zero; if the SCL pin is sampled as ‘0’

during this time, a bus collision does not occur. At the

end of the BRG count, the SCL pin is asserted low.

FIGURE 27-25:

BUS COLLISION DURING START CONDITION (SDA ONLY)

Note:

The reason that bus collision is not a

factor during a Start condition is that no

two bus masters can assert a Start

condition

the

exact

same

time.

Therefore, one master will always assert

SDA before the other. This condition does

not cause a bus collision because the two

masters must be allowed to arbitrate the

first address following the Start condition.

If the address is the same, arbitration

must be allowed to continue into the data

portion,

Repeated

Start

Stop

conditions.

SDA

SCL

SEN

SDA sampled low before

SDA goes low before the SEN bit is set.

S bit and SSPIF set because

SSP module reset into Idle state.

SEN cleared automatically because of bus collision.

S bit and SSPIF set because

Set SEN, enable Start

condition if SDA = 1, SCL = 1

SDA = 0, SCL = 1.

BCLIF

SSPIF

SDA = 0, SCL = 1.

SSPIF and BCLIF are

cleared by software

SSPIF and BCLIF are

cleared by software

Set BCLIF,

Start condition. Set BCLIF.

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