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OPTION_REG 数据表(PDF) 191 Page - Microchip Technology

部件名 OPTION_REG
功能描述  Digitally Enhanced Power Analog Controller with Integrated Synchronous Driver
PDF  222 Pages
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制造商  MICROCHIP [Microchip Technology]
网页  http://www.microchip.com
标志 MICROCHIP - Microchip Technology

OPTION_REG 数据表(HTML) 191 Page - Microchip Technology

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 2013 Microchip Technology Inc.
DS22331A-page 191
MCP19111
29.0
INSTRUCTION SET SUMMARY
The MCP19111 instruction set is highly orthogonal and
is comprised of three basic categories:
• Byte-oriented operations
• Bit-oriented operations
• Literal and control operations
Each instruction is a 14-bit word divided into an
opcode, which specifies the instruction type, and one
or more operands, which further specify the operation
of the instruction. The formats for each of the
categories is presented in Figure 29-1, while the
various opcode fields are summarized in Table 29-1.
Table 29-2 lists the instructions recognized by the
MPASMTM assembler.
For byte-oriented instructions, ‘f’ represents a file
register designator and ‘d’ represents a destination
designator. The file register designator specifies which
file register is to be used by the instruction.
The destination designator specifies where the result of
the operation is to be placed. If ‘d’ is zero, the result is
placed in the W register. If ‘d’ is one, the result is placed
in the file register specified in the instruction.
For bit-oriented instructions, ‘b’ represents a bit field
designator, which selects the bit affected by the
operation, while ‘f’ represents the address of the file in
which the bit is located.
For literal and control operations, ‘k’ represents an
8-bit or 11-bit constant, or literal value.
One instruction cycle consists of four oscillator periods;
for an oscillator frequency of 4 MHz, this gives a normal
instruction execution time of 1 µs. All instructions are
executed within a single instruction cycle, unless a
conditional test is true, or the program counter is
changed as a result of an instruction. When this occurs,
the execution takes two instruction cycles, with the
second cycle executed as a NOP.
All instruction examples use the format ‘0xhh’ to
represent a hexadecimal number, where ‘h’ signifies a
hexadecimal digit.
29.1
Read-Modify-Write Operations
Any instruction that specifies a file register as part of
the instruction performs a Read-Modify-Write (RMW)
operation. The register is read, the data is modified,
and the result is stored according to either the
instruction or the destination designator ‘d’. A read
operation is performed on a register even if the
instruction writes to that register.
For example, a CLRF
PORTA
instruction will read
PORTGPA, clear all the data bits, then write the result
back to PORTGPA. This example would have the
unintended consequence of clearing the condition that
set the IOCIF flag.
FIGURE 29-1:
GENERAL FORMAT FOR
INSTRUCTIONS
TABLE 29-1:
OPCODE FIELD
DESCRIPTIONS
Field
Description
f
Register file address (0x00 to 0x7F)
W
Working register (accumulator)
b
Bit address within an 8-bit file register
k
Literal field, constant data or label
x
Don’t care location (= 0 or 1).
The assembler will generate code with x = 0.
It is the recommended form of use for
compatibility with all Microchip software tools.
d
Destination select; d = 0: store result in W,
d = 1: store result in file register f.
Default is d = 1.
PC
Program Counter
TO
Time-Out bit
C
Carry bit
DC
Digit carry bit
Z
Zero bit
PD
Power-Down bit
Byte-Oriented file register operations
13
8
7
6
0
d = 0 for destination W
OPCODE
d
f (FILE #)
d = 1 for destination f
f = 7-bit file register address
Bit-Oriented file register operations
13
10 9
7 6
0
OPCODE
b (BIT #)
f (FILE #)
b = 3-bit bit address
f = 7-bit file register address
Literal and control operations
13
8
7
0
OPCODE
k (literal)
k = 8-bit immediate value
13
11
10
0
OPCODE
k (literal)
k = 11-bit immediate value
General
CALL
and GOTO instructions only



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